AD8304ARUZ-RL7 Analog Devices Inc, AD8304ARUZ-RL7 Datasheet - Page 15

• Manufacturer Part Number: AD8304ARUZ-RL7
• Description: IC,Level Detector,TSSOP,14PIN,PLASTIC
• Manufacturer: Analog Devices Inc
• Type: Logarithmic Converterr

Specifications of AD8304ARUZ-RL7

• Design Resources: Interfacing ADL5315 to Translinear Logarithmic Amplifier (CN0056) Interfacing ADL5317 High Side Current Mirror to a Translinear Logarithmic Amplifier in an Avalanche Photodiode Power Detector
• Applications: Fiber Optics
• Mounting Type: Surface Mount
• Package / Case: 14-TSSOP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Summing Node at Ground and Voltage Inputs
A negative supply may be used to reposition the input node at
ground potential. A voltage as small as –0.5 V is sufficient. Figure 13
shows the use of this feature. An input current of up to 10 mA is
supported.
This connection mode will be useful in cases where the source is a
positive voltage V
photodiodes, or other “perfect” current sources. R
input current and should be chosen to optimally position the range
of I
the loading of the signal source. For example, assume a voltage
source that spans the four-decade range from 100 mV to 1 kV and
is desired to maximize R
100 pA to 1 mA. Using a value of 10 MΩ, the same four decades
of input voltage would span the central current range of 10 nA
to 100 mA.
Smaller input voltages can be measured accurately when aided by
a small offset-nulling voltage applied to VSUM. The optional
network shown in Figure 13 provides more than ± 20 mV for
this purpose.
Figure 13. Using a Negative Supply and Placing VSUM at
Ground Permits Voltage-Mode Inputs
The minimum voltage that can be accurately measured is then
limited only by the drift in the input offset of the AD8304. The
specifications show the maximum spread over the full tempera-
ture and supply range. Over a limited temperature range, and with
a regulated supply, the offset drift will be lower; in this situation,
processing of inputs down to 5 mV is practicable.
The input system of the AD8304 is quasi-differential, so VSUM
can be placed at an arbitrary reference level V
range, and used as the “signal LO” of the source. For example,
using V
a ± 2.5 V range.
Providing Negative Outputs and Rescaling
As noted, the AD8304 allows the buffer to drive a load to negative
voltages with respect to ACOM, the analog common pin, which
REV. A
V
NC = NO CONNECT
P
RIN
PD
V
SIG
1k
, or provide a very high input resistance, thus minimizing
I
PD
10k
NC
P
= 5 V and V
V
6
3
4
5
LOW
AD8304
VSUM
VSUM
VPDB
INPT
VPS2
SIG
1
PDB
referenced to ground, rather than for use with
VNEG
10
N
IN
V
= –3 V, V
N
. When set to 1 GΩ, I
PWDN
~10k
COMPENSATION
ACOM
TEMPERATURE
BIAS
2
LOW
14
can be any voltage within
0.5V
VPS1
VREF
VOUT
12
5k
LOW
PD
11
spans the range
BFNG
, over a wide
BFIN
IN
scales the
13
7
8
9
V
P
VLOG
VREF
RB
V
OUT
RA
–15–
is grounded. A negative supply capable of supporting the input
current I
out of the VNEG Pin, and the load current at VLOG. For the
example shown in Figure 14, this totals less than 20 mA when
driving a 1 kΩ load as far as –4 V.
The use of a much larger value for the intercept may be useful in
certain situations. In this example, it has been moved up four
decades, from the default value of 100 pA to the center of the full
eight-decade range at 1 mA. Using a voltage input as described
above, this corresponds to an altered voltage-mode intercept, V
which would be 1 V for R
larger output swing, the gain of the buffer has been increased to
4.53, resulting in a scaling of 900 mV/decade and a full-scale
output of ± 3.6 V.
Inverting the Slope
The buffer is essentially an uncommitted op amp that can be used
to support the operation of the AD8304 in a variety of ways. It
can be completely disconnected from the signal chain when not
needed. Figure 15 shows its use as an inverting amplifier; this
changes the polarity of the slope. The output can either be
repositioned to all positive values by applying a fraction of V
to the BFIN Pin, or range negative when using a negative supply.
The full design for a practical application is left undefined in this
brief illustration, but a few cases will be discussed.
For example, suppose we need a slope of –30 mV/dB; this requires
the gain to be three. Since V
5 kΩ, R
is available, the output voltage can swing below ground, and the
BFIN Pin may be grounded. But a negative slope is still possible
when only a single supply is used; a positive offset, V
to this pin, as indicated in Figure 15. In general, the resulting
output voltage can be expressed as:
V
P
RIN
V
SIG
1k
V
NC = NO CONNECT
I
PD
Figure 14. Using a Negative Supply to Allow the
Output to Swing Below Ground
OUT
10k
NC
B
PD
must be 15 kΩ. In cases where a small negative supply
V
4
6
3
5
=
LOW
must be used, the fraction of quiescent bias that flows
AD8304
VPDB
VSUM
VSUM
INPT
–



5
VPS2
R
k
B
Ω
1
PDB
VNEG
10



V
V
Y
N
IN
PWDN
×
~10k
= 1 MΩ. To take full advantage of the
log
LOG
COMPENSATION
ACOM
TEMPERATURE
BIAS
10
2
exhibits a source resistance of



I
14
I
PD
Z

 +

VPS1
0.5V
V
VREF
OFS
VOUT
12
5k
AD8304
11
BFNG
BFIN
OFS
, is applied
13
7
8
9
V
P
VLOG
VREF
RB
22.6k
V
(16)
OUT
REF
RC
12.4k
RA
13.3k
RL
1k
Z
,