AD8251ARMZ-RL Analog Devices Inc, AD8251ARMZ-RL Datasheet - Page 16

• Manufacturer Part Number: AD8251ARMZ-RL
• Description: IC,Instrumentation Amplifier,SINGLE,TSSOP,10PIN,PLASTIC
• Manufacturer: Analog Devices Inc
• Series: iCMOS®r

Specifications of AD8251ARMZ-RL

• Amplifier Type: Instrumentation
• Number Of Circuits: 1
• Slew Rate: 30 V/µs
• -3db Bandwidth: 10MHz
• Current - Input Bias: 5nA
• Voltage - Input Offset: 70µV
• Current - Supply: 4.1mA
• Current - Output / Channel: 37mA
• Voltage - Supply, Single/dual (±): 10 V ~ 30 V, ±5 V ~ 15 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 10-MSOP, Micro10™, 10-uMAX, 10-uSOP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Output Type: -
• Gain Bandwidth Product: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

AD8251
THEORY OF OPERATION
The AD8251 is a monolithic instrumentation amplifier based
on the classic 3-op-amp topology, as shown in Figure 51. It is
fabricated on the Analog Devices, Inc., proprietary iCMOS®
process that provides precision, linear performance, and a
robust digital interface. A parallel interface allows users to
digitally program gains of 1, 2, 4, and 8. Gain control is achieved
by switching resistors in an internal, precision resistor array (as
shown in Figure 51). Although the AD8251 has a voltage feedback
topology, the gain bandwidth product increases for gains of 1, 2,
and 4 because each gain has its own frequency compensation.
This results in maximum bandwidth at higher gains.
All internal amplifiers employ distortion cancellation circuitry
and achieve high linearity and ultralow THD. Laser trimmed
resistors allow for a maximum gain error of less than 0.03%
for G = 1 and minimum CMRR of 98 dB for G = 8. A pinout
optimized for high CMRR over frequency enables the AD8251
to offer a guaranteed minimum CMRR over frequency of 80 dB
at 50 kHz (G = 1). The balanced input reduces the parasitics
that, in the past, adversely affected CMRR performance.
GAIN SELECTION
Logic low and logic high voltage limits are listed in the
Specifications section. Typically, logic low is 0 V and logic high
is 5 V; both voltages are measured with respect to DGND. See
Table 2 for the permissible voltage range of DGND. The gain of
the AD8251 can be set using two methods.
–IN
+IN
2.2kΩ
2.2kΩ
+V
–V
+V
–V
S
S
S
S
A1
A2
WR
DIGITAL
GAIN
CONTROL
A0
Figure 51. Simplified Schematic
+V
–V
+V
–V
S
S
S
S
Rev. B | Page 16 of 24
2.2kΩ
2.2kΩ
+V
–V
+V
–V
10kΩ
10kΩ
S
S
S
S
Transparent Gain Mode
The easiest way to set the gain is to program it directly via a
logic high or logic low voltage applied to A0 and A1. Figure 52
shows an example of this gain setting method, referred to through-
out the data sheet as transparent gain mode. Tie WR to the negative
supply to engage transparent gain mode. In this mode, any change
in voltage applied to A0 and A1 from logic low to logic high, or
vice versa, immediately results in a gain change.
truth table for transparent gain mode, and
AD8251 configured in transparent gain mode.
A1
DGND
NOTE:
1. IN TRANSPARENT GAIN MODE, WR IS TIED TO −V
Figure 52. Transparent Gain Mode, A0 and A1 = High, G = 8
A3
THE VOLTAGE LEVELS ON A0 AND A1 DETERMINE
THE GAIN. IN THIS EXAMPLE, BOTH A0 AND A1 ARE
SET TO LOGIC HIGH, RESULTING IN A GAIN OF 8.
10kΩ
10kΩ
–IN
+IN
10μF
10μF
0.1µF
0.1µF
+V
–V
+V
–V
S
S
S
S
+15V
–15V
OUT
REF
AD8251
DGND
WR
A1
A0
REF
DGND
–15V
+5V
+5V
G = 8
Figure 52
S
.
Table 5
shows the
is the