AD8131ARM Analog Devices Inc, AD8131ARM Datasheet - Page 16
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AD8131ARM
Manufacturer Part Number
AD8131ARM
Description
Amplifier IC
Manufacturer
Analog Devices Inc
Datasheet
1.AD8131ARMZ-REEL7.pdf
(20 pages)
Specifications of AD8131ARM
No. Of Amplifiers
1
Bandwidth
620MHz
Slew Rate
2000V/µs
No. Of Pins
8
Mounting Type
Surface Mount
Peak Reflow Compatible (260 C)
No
Leaded Process Compatible
No
Package / Case
8-uSOIC
Rohs Status
RoHS non-compliant
Amplifier Type
Differential
Number Of Circuits
1
Output Type
Differential
-3db Bandwidth
400MHz
Current - Input Bias
500nA
Voltage - Input Offset
1500µV
Current - Supply
11.5mA
Current - Output / Channel
60mA
Voltage - Supply, Single/dual (±)
2.8 V ~ 11 V, ±1.4 V ~ 5.5 V
Operating Temperature
-40°C ~ 125°C
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Gain Bandwidth Product
-
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
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AD8131
THEORY OF OPERATION
The AD8131 differs from conventional op amps in that it has
two outputs whose voltages move in opposite directions. Like
an op amp, it relies on high open-loop gain and negative
feedback to force these outputs to the desired voltages. The
AD8131 behaves much like a standard voltage feedback op amp
and makes it easy to perform single-ended-to-differential
conversion, common-mode level-shifting, and amplification of
differential signals.
Previous discrete and integrated differential driver designs used
two independent amplifiers and two independent feedback
loops, one to control each of the outputs. When these circuits
are driven from a single-ended source, the resulting outputs are
typically not well balanced. Achieving a balanced output
typically required exceptional matching of the amplifiers and
feedback networks.
DC common-mode level shifting has also been difficult with
previous differential drivers. Level shifting required the use of a
third amplifier and feedback loop to control the output
common-mode level. Sometimes the third amplifier has also
been used to attempt to correct an inherently unbalanced
circuit. Excellent performance over a wide frequency range has
proven difficult with this approach.
The AD8131 uses two feedback loops to separately control the
differential and common-mode output voltages. The differential
feedback, set by internal resistors, controls only the differential
output voltage. The common-mode feedback controls only the
common-mode output voltage. This architecture makes it easy
to arbitrarily set the common-mode output level. It is forced, by
internal common-mode feedback, to be equal to the voltage
applied to the V
output voltage.
The AD8131 architecture results in outputs that are very highly
balanced over a wide frequency range without requiring
external components or adjustments. The common-mode
feedback loop forces the signal component of the output
common-mode voltage to be zeroed. The result is nearly
perfectly balanced differential outputs, of identical amplitude
and exactly 180 degrees apart in phase.
ANALYZING AN APPLICATION CIRCUIT
The AD8131 uses high open-loop gain and negative feedback to
force its differential and common-mode output voltages in such
a way as to minimize the differential and common-mode error
voltages. The differential error voltage is defined as the voltage
between the differential inputs labeled +IN and −IN in
Figure 39. For most purposes, this voltage can be assumed to be
zero. Similarly, the difference between the actual output
common-mode voltage and the voltage applied to V
OCM
input, without affecting the differential
OCM
can also
Rev. B | Page 16 of 20
be assumed to be zero. Starting from these two assumptions,
any application circuit can be analyzed.
CLOSED-LOOP GAIN
The differential mode gain of the circuit in Figure 39 can be
described by the following equation:
where R
ESTIMATING THE OUTPUT NOISE VOLTAGE
Similar to the case of a conventional op amp, the differential
output errors (noise and offset voltages) can be estimated by
multiplying the input referred terms, at +IN and −IN, by the
circuit noise gain. The noise gain is defined as
The total output referred noise for the AD8131, including the
contributions of R
at 20 MHz.
CALCULATING THE INPUT IMPEDANCE OF AN
APPLICATION CIRCUIT
The effective input impedance of a circuit such as that in
Figure 39, at +D
amplifier is being driven by a single-ended or differential signal
source. For balanced differential input signals, the input
impedance (R
In the case of a single-ended input signal (for example if −D
grounded and the input signal is applied to +D
impedance becomes
The input impedance is effectively higher than it would be for a
conventional op amp connected as an inverter because a
fraction of the differential output voltage appears at the inputs
as a common-mode signal, partially bootstrapping the voltage
across the input resistor R
G
R
R
V
V
N
IN
IN
OUT,
F
IN,
,
,
=
dm
= 1.5 kΩ and R
dm
dm
1
dm
=
+
=
IN, dm
2
⎛
⎜
⎜
⎜
⎜ ⎜
⎝
⎛
⎜
⎜
⎝
=
1
×
R
R
IN
−
G
R
F
R
R
) between the inputs (+D
F
and −D
, R
G
G
F
⎞
⎟
⎟
⎠
2
×
=
=
=
G
, and op amp, is nominally 25 nV/√Hz
R
(
3
1
R
2
5 .
G
R
G
G
IN
G
F
= 750 Ω nominally.
k
+
.
, will depend on whether the
Ω
R
F
)
⎞
⎟
⎟
⎟
⎟ ⎟
⎠
=
. 1
125
IN
k
Ω
and −D
IN
), the input
IN
) is
IN
is