AD7999YRJZ-1RL Analog Devices Inc, AD7999YRJZ-1RL Datasheet - Page 9
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AD7999YRJZ-1RL
Manufacturer Part Number
AD7999YRJZ-1RL
Description
IC,Data Acquisition System,4-CHANNEL,8-BIT,TSSOP,8PIN,PLASTIC
Manufacturer
Analog Devices Inc
Datasheet
1.AD7999YRJZ-1500RL7.pdf
(28 pages)
Specifications of AD7999YRJZ-1RL
Design Resources
Using AD8599 as an Ultralow Distortion Driver for the AD7999 (CN0045)
Number Of Bits
8
Sampling Rate (per Second)
1M
Data Interface
I²C, Serial
Number Of Converters
1
Power Dissipation (max)
4.68mW
Voltage Supply Source
Single Supply
Operating Temperature
-40°C ~ 125°C
Mounting Type
Surface Mount
Package / Case
SOT-23-8
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
AD7999YRJZ-1RL
Manufacturer:
ADI
Quantity:
3 000
I
Guaranteed by initial characterization. All values were measured with the input filtering enabled. C
with t
Table 5.
Parameter
f
t
t
t
t
t
t
t
t
t
SCL
2
1
2
3
4
5
6
7
8
9
1
1
1
1, 2
1
1
1
1
C TIMING SPECIFICATIONS
1
r
and t
f
measured between 0.3 V
Conditions
Standard mode
Fast mode
High speed mode
Standard mode
Fast mode
High speed mode
Standard mode
Fast mode
High speed mode
Standard mode
Fast mode
High speed mode
Standard mode
Fast mode
High Speed mode
Standard mode
Fast mode
High Speed mode
Standard mode
Fast mode
High speed mode
Standard mode
Fast mode
Standard mode
Fast mode
High speed mode
Standard mode
Fast mode
High speed mode
C
C
C
C
C
C
C
C
C
C
B
B
B
B
B
B
B
B
B
B
= 100 pF maximum
= 400 pF maximum
= 100 pF maximum
= 400 pF maximum
= 100 pF maximum
= 400 pF maximum
= 100 pF maximum
= 400 pF maximum
= 100 pF maximum
= 400 pF maximum
DD
and 0.7 V
Min
4
0.6
60
120
4.7
1.3
160
320
250
100
10
0
0
0
0
4.7
0.6
160
4
0.6
160
4.7
1.3
4
0.6
160
20 + 0.1 C
10
20
DD
Limit at t
(see Figure 2). Unless otherwise noted, V
B
Typ
MIN
Rev. B | Page 9 of 28
, t
MAX
Max
100
400
3.4
1.7
3.45
0.9
70
150
1000
300
80
160
3
Unit
kHz
kHz
MHz
MHz
μs
μs
ns
ns
μs
μs
ns
ns
ns
ns
ns
μs
μs
ns
ns
μs
μs
ns
μs
μs
ns
μs
μs
μs
μs
ns
ns
ns
ns
ns
Description
Serial clock frequency
t
t
t
t
t
t
t
t
t
HIGH
LOW
SU;DAT
HD;DAT
SU;STA
HD;STA
BUF
SU;STO
RDA
, bus-free time between a stop and a start condition
, rise time of the SDA signal
, SCL low time
, SCL high time
, setup time for a repeated start condition
, data setup time
, hold time for a repeated start condition
, setup time for a stop condition
, data hold time
DD
B
refers to the capacitive load on the bus line,
= 2.7 V to 5.5 V and T
AD7991/AD7995/AD7999
A
= T
MIN
to T
MAX
.