AD7894AR-10 Analog Devices Inc, AD7894AR-10 Datasheet - Page 3

• Manufacturer Part Number: AD7894AR-10
• Description: A/D Converter (A-D) IC
• Manufacturer: Analog Devices Inc

Specifications of AD7894AR-10

• Peak Reflow Compatible (260 C): No
• No. Of Bits: 14 Bit
• Leaded Process Compatible: No
• Mounting Type: Surface Mount
• Features: +5V, 14?Bit, Serial ADC In 8?Pin SOIC
• No. Of Channels: 1
• Interface Type: Serial
• Rohs Status: RoHS non-compliant
• Number Of Bits: 14
• Sampling Rate (per Second): 200k
• Data Interface: Serial
• Number Of Converters: 1
• Power Dissipation (max): 27.5mW
• Voltage Supply Source: Single Supply
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 8-SOIC (0.154", 3.90mm Width)
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

TIMING CHARACTERISTICS
Parameter
t
t
t
t
t
t
NOTES
1
2
3
4
Specifications subject to change without notice.
ABSOLUTE MAXIMUM RATINGS*
(T
V
Analog Input Voltage to GND
Reference Input Voltage to GND . . . . –0.3 V to V
Digital Input Voltage to GND . . . . . . . –0.3 V to V
Digital Output Voltage to GND . . . . . –0.3 V to V
Operating Temperature Range
REV. 0
Parameter
POWER REQUIREMENTS
NOTES
1
2
3
4
5
Specifications subject to change without notice.
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection.
Although the AD7894 features proprietary ESD protection circuitry, permanent damage may
occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD
precautions are recommended to avoid performance degradation or loss of functionality.
The SCLK maximum frequency is 16 MHz. Care must be taken when interfacing to account for the data access time, t
1
2
3
4
5
6
Sample tested at +25 C to ensure compliance. All input signals are measured with tr = tf = 1 ns (10% to 90% of +5 V) and timed from a voltage level of +1.6 V.
processor. These two times will determine the maximum SCLK frequency with which the user’s system can operate. See Serial Interface section for more information.
Measured with the load circuit of Figure 1 and defined as the time required for an output to cross 0.8 V or 2.0 V.
Derived from the measured time taken by the data outputs to change 0.5 V when loaded with the circuit of Figure 1. The measured number is then extrapolated back
to remove the effects of charging or discharging the 50 pF capacitor. This means that the time, t
of the part and as such is independent of external bus loading capacitances.
Temperature ranges are as follows: A, B Versions: –40 C to +85 C.
Applies to Mode 1 operation. See Operating Modes section.
See Terminology.
Sample tested @ +25 C to ensure compliance.
This 10 s includes the “wake-up” time from standby. This “wake-up” time is timed from the rising edge of CONVST, whereas conversion is timed from the falling
edge of CONVST, for narrow CONVST pulsewidth the conversion time is effectively the “wake-up” time plus conversion time, hence 10 s. This can be seen from
Figure 3. Note that if the CONVST pulsewidth is greater than 5 s, the effective conversion time will increase beyond 10 s.
AD7894-10 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
AD7894-3 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
AD7894-2 . . . . . . . . . . . . . . . . . . . . . . . . . . . –5 V to +10 V
Commercial (A, B Versions) . . . . . . . . . . . –40 C to +85 C
Storage Temperature Range . . . . . . . . . . . –65 C to +150 C
DD
A
V
I
Power Dissipation
Power-Down Mode
DD
= +25 C unless otherwise noted)
DD
to GND . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to +7 V
I
Power Dissipation T
DD
@ T
MIN
to T
MAX
MIN
A, B Versions
40
31.25
31.25
60
10
20
to T
3
4
MAX
2
2
1, 2
A Versions
+5
5.5
27.5
20
100
(V
DD
= +5 V
DD
DD
DD
l
Units
ns min
ns min
ns min
ns max
ns min
ns max
+ 0.3 V
+ 0.3 V
+ 0.3 V
17 V
5%, GND = 0 V, REF IN = +2.5 V)
B Versions
+5
5.5
27.5
20
100
7 V
–3–
Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . +150 C
SOIC Package, Power Dissipation . . . . . . . . . . . . . . . 450 mW
*Stresses above those listed under Absolute Maximum Ratings may cause perma-
nent damage to the device. This is a stress rating only; functional operation of the
device at these or any other conditions above those listed in the operational
sections of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect device reliability.
Lead Temperature, Soldering
1
JA
Vapor Phase (60 sec) . . . . . . . . . . . . . . . . . . . . . . . +215 C
Infrared (15 sec) . . . . . . . . . . . . . . . . . . . . . . . . . . . +220 C
Units
V nom
mA max
mW max
Thermal Impedance . . . . . . . . . . . . . . . . . . . . . 170 C/W
A max
W max
6
, quoted in the timing characteristics is the true bus relinquish time
Test Conditions/Comments
CONVST Pulsewidth
SCLK High Pulsewidth
SCLK Low Pulsewidth
Data Access Time after Falling Edge of SCLK
V
Data Hold Time after Falling Edge of SCLK
Bus Relinquish Time after Falling Edge of SCLK
DD
= 5 V
Test Conditions/Comments
Digital Inputs @ V
Typically 20 mW
Digital Inputs @ GND, V
Typ 15 W
5% for Specified Performance
5%
4
, and the setup time required for the user’s
WARNING!
DD
, V
DD
ESD SENSITIVE DEVICE
DD
= 5 V
= 5 V
AD7894
5%
5%