AD7863ARZ-2 Analog Devices Inc, AD7863ARZ-2 Datasheet - Page 4

• Manufacturer Part Number: AD7863ARZ-2
• Description: IC,Data Acquisition System,2-CHANNEL,14-BIT,SOP,28PIN,PLASTIC
• Manufacturer: Analog Devices Inc

Specifications of AD7863ARZ-2

• Number Of Bits: 14
• Sampling Rate (per Second): 175k
• Data Interface: Parallel
• Number Of Converters: 2
• Power Dissipation (max): 94.5mW
• Voltage Supply Source: Analog and Digital
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 28-SOIC (0.300", 7.50mm Width)
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

AD7863
Parameter
REFERENCE INPUT/OUTPUT
LOGIC INPUTS
LOGIC OUTPUTS
CONVERSION RATE
POWER REQUIREMENTS
1
2
3
4
5
6
7
8
Temperature ranges are as follows: A Version and B Version, −40°C to +85°C.
Sample tested during initial release.
Applies to Mode 1 operation. See Operating Modes section.
See Terminology section.
Sample tested @ 25°C to ensure compliance.
This 10 μs includes the wake-up time from standby. This wake-up time is timed from the rising edge of CONVST , whereas conversion is timed from the falling edge of
CONVST , for a narrow CONVST pulse width the conversion time is effectively the wake-up time plus conversion time, 10 μs. This can be seen from Figure 6. Note that if
the CONVST pulse width is greater than 5.2 μs, the effective conversion time increases beyond 10 μs.
Performance measured through full channel (multiplexer, SHA, and ADC).
For best dynamic performance of the AD7863, ATE device testing has to be performed with power supply decoupling in place. In the AD7863 power-down mode of
operation, the leakage current associated with these decoupling capacitors is greater than that of the AD7863 supply current. Therefore, the 40 nA typical figure
shown is characterized and guaranteed by design figure, which reflects the supply current of the AD7863 without decoupling in place. The maximum figure shown in
the Conditions/Comments column reflects the AD7863 with supply decoupling in place—0.1 μF in parallel with 10 μF disc ceramic capacitors on the V
2 × 0.1 μF disc ceramic capacitors on the V
REF IN Input Voltage Range
REF IN Input Current
REF OUT Output Voltage
REF OUT Error @ 25°C
REF OUT Error T
REF OUT Temperature Coefficient
Input High Voltage, V
Input Low Voltage, V
Input Current, I
Input Capacitance, C
Output High Voltage, V
Output Low Voltage, V
DB11 to DB0
Output Coding
Conversion Time
Track/Hold Acquisition Time
V
I
Power-Down Mode (Mode 2)
Power Dissipation
DD
DD
Floating-State Leakage Current
Floating-State Capacitance
AD7863-10, AD7863-3
AD7863-2
Mode 1 Operation
Mode 2 Operation
Normal Mode (Mode 1)
I
Normal Mode (Mode 1)
Power-Down Mode @ 25°C
DD
AD7863-10
AD7863-3
AD7863-2
AD7863-10
AD7863-3
AD7863-2
@ 25°C
8
IN
MIN
to T
INL
IN
INH
6
5
MAX
OL
OH
4, 7
5
REF
pin, in both cases to the AGND plane.
A Version
2.375 to 2.625
±100
2.5
±10
±20
25
2.4
0.8
±10
10
4.0
0.4
±10
10
5.2
10.0
0.5
5
18
16
11
20
94.50
84
57.75
105
1
Rev. B | Page 4 of 24
B Version
2.375 to 2.625
±100
2.5
±10
±20
25
2.4
0.8
±10
10
4.0
0.4
±10
10
5.2
10.0
0.5
5
18
16
11
20
94.50
84
57.75
105
1
Unit
V
μA max
V nom
mV max
mV max
ppm/°C typ
V min
V max
μA max
pF max
V min
V max
μA max
pF max
μs max
μs max
μs max
V nom
mA max
mA max
mA max
μA max
mW max
mW max
mW max
μW max
Twos complement
Test Conditions/Comments
2.5 V ± 5%
V
V
I
I
Straight (natural) binary
For both channels
For both channels
±5% for specified performance
40 nA typ. Logic inputs = 0 V or V
V
V
V
210 nW typ, V
SOURCE
SINK
DD
DD
DD
DD
DD
= 5 V ± 5%
= 5 V ± 5%
= 1.6 mA
= 5.25 V, 70 mW typ
= 5.25 V, 70 mW typ
= 5.25 V, 45 mW typ
= 200 μA
DD
= 5.25 V
DD
pin and
DD