AD7843ARUZ-REEL7 Analog Devices Inc, AD7843ARUZ-REEL7 Datasheet - Page 6

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AD7843ARUZ-REEL7

Manufacturer Part Number
AD7843ARUZ-REEL7
Description
12 Bit 16 Lead Tssop
Manufacturer
Analog Devices Inc
Type
Resistiver
Datasheet

Specifications of AD7843ARUZ-REEL7

Touch Panel Interface
4-Wire
Number Of Inputs/keys
1 TSC
Resolution (bits)
12 b
Data Interface
Serial
Data Rate/sampling Rate (sps, Bps)
125k
Voltage Reference
External
Voltage - Supply
2.2 V ~ 5.25 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
16-TSSOP
Voltage Supply Source
Single Supply
Sampling Rate (per Second)
125k
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
EVAL-AD7843EBZ - BOARD EVAL FOR AD7843
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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Quantity
Price
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Manufacturer:
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AD7843
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
Table 4. Pin Function Descriptions
Pin No.
1, 10
2
3
4
5
6
7
8
9
11
12
13
14
15
16
Mnemonic
+V
X+
Y+
X−
Y−
GND
IN3
IN4
V
PENIRQ
DOUT
BUSY
DIN
CS
DCLK
REF
CC
Function
Power Supply Input. The +V
directly together.
X+ Position Input. ADC Input Channel 1.
Y+ Position Input. ADC Input Channel 2.
X− Position Input.
Y− Position Input.
Analog Ground. Ground reference point for all circuitry on the AD7843. All analog input signals and any external
reference signal should be referred to this GND voltage.
Auxiliary Input 1. ADC Input Channel 3.
Auxiliary Input 2. ADC Input Channel 4.
Reference Input for the AD7843. An external reference must be applied to this input. The voltage range for the
external reference is 1.0 V to +V
Pen Interrupt. CMOS logic open-drain output (requires 10 kΩ to 100 kΩ pull-up register externally).
Data Out. Logic Output. The conversion result from the AD7843 is provided on this output as a serial data stream.
The bits are clocked out on the falling edge of the DCLK input. This output is high impedance when CS is high.
BUSY Output. Logic Output. This output is high impedance when CS is high.
Data In. Logic input. Data to be written to the AD7843 control register is provided on this input and is clocked into
the register on the rising edge of DCLK (see the Control Register section).
Chip Select Input. Active Low Logic Input. This input provides the dual function of initiating conversions on the
AD7843 and also enables the serial input/output register.
External Clock Input. Logic Input. DCLK provides the serial clock for accessing data from the part. This clock input
is also used as the clock source for the AD7843 conversion process.
Figure 3. Pin Configuration QSOP/TSSOP
CC
+V
GND
range for the AD7843 is from 2.2 V to 5.25 V. Both +V
IN3
IN4
X+
Y+
CC
X–
Y–
CC
. For specified performance, it is 2.5 V.
1
2
3
4
5
6
7
8
(Not to Scale)
Rev. B | Page 6 of 20
AD7843
TOP VIEW
16
15
14
13
12
11
10
9
DCLK
CS
DIN
BUSY
DOUT
PENIRQ
+V
V
REF
CC
CC
pins should be connected

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