AD7730LBR Analog Devices Inc, AD7730LBR Datasheet - Page 34
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AD7730LBR
Manufacturer Part Number
AD7730LBR
Description
A/D Converter (A-D) IC
Manufacturer
Analog Devices Inc
Datasheet
1.AD7730LBRUZ.pdf
(52 pages)
Specifications of AD7730LBR
Peak Reflow Compatible (260 C)
No
No. Of Bits
24 Bit
Leaded Process Compatible
No
Features
Bridge Transducer, Compl. Anal. Front-End
Package / Case
24-SOIC
Rohs Status
RoHS non-compliant
Number Of Bits
24
Sampling Rate (per Second)
600
Data Interface
DSP, Serial, SPI™
Number Of Converters
1
Power Dissipation (max)
125mW
Voltage Supply Source
Analog and Digital
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
For Use With
EVAL-AD7730LEBZ - BOARD EVALUATION FOR AD7730EVAL-AD7730EBZ - BOARD EVAL FOR AD7730
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
AD7730LBRUZ
Manufacturer:
ADI
Quantity:
1 000
Company:
Part Number:
AD7730LBRUZ-REEL7
Manufacturer:
ADI
Quantity:
1 000
Part Number:
AD7730LBRZ
Manufacturer:
ADI/亚德诺
Quantity:
20 000
Company:
Part Number:
AD7730LBRZ-REEL
Manufacturer:
AD
Quantity:
1 000
AD7730/AD7730L
POWER SUPPLIES
There is no specific power sequence required for the AD7730,
either the AV
the latch-up performance of the AD7730 is very good, it is
important that power is applied to the AD7730 before signals at
REF IN, AIN or the logic input pins in order to avoid latch-up
caused by excessive current. If this is not possible, the current
that flows in any of these pins should be limited to less than 30
mA per pin and less than 100 mA cumulative. If separate sup-
plies are used for the AD7730 and the system digital circuitry,
the AD7730 should be powered up first. If it is not possible to
guarantee this, current limiting resistors should be placed in
series with the logic inputs to again limit the current to less than
30 mA per pin and less than 100 mA total.
Grounding and Layout
Since the analog inputs and reference input are differential,
most of the voltages in the analog modulator are common-mode
voltages. The excellent common-mode rejection of the part will
remove common-mode noise on these inputs. The analog and
digital supplies to the AD7730 are independent and separately
pinned out to minimize coupling between the analog and digital
sections of the device. The digital filter will provide rejection of
broadband noise on the power supplies, except at integer mul-
tiples of the modulator sampling frequency or multiples of the
chop frequency in chop mode. The digital filter also removes
noise from the analog and reference inputs provided those noise
sources do not saturate the analog modulator. As a result, the
AD7730 is more immune to noise interference than a conven-
tional high resolution converter. However, because the resolu-
tion of the AD7730 is so high and the noise levels from the
AD7730 so low, care must be taken with regard to grounding
and layout.
The printed circuit board that houses the AD7730 should be
designed so the analog and digital sections are separated and
confined to certain areas of the board. This facilitates the use of
ground planes that can be easily separated. A minimum etch
technique is generally best for ground planes as it gives the best
shielding. Digital and analog ground planes should only be
joined in one place. If the AD7730 is the only device requiring
an AGND to DGND connection, the ground planes should
be connected at the AGND and DGND pins of the AD7730. If
the AD7730 is in a system where multiple devices require AGND
to DGND connections, the connection should still be made at
one point only, a star ground point that should be established as
closely as possible to the AD7730.
Avoid running digital lines under the device as these will couple
noise onto the die. The analog ground plane should be allowed
to run under the AD7730 to avoid noise coupling. The power
supply lines to the AD7730 should use as large a trace as pos-
sible to provide low impedance paths and reduce the effects of
glitches on the power supply line. Fast switching signals such as
clocks should be shielded with digital ground to avoid radiating
noise to other sections of the board and clock signals should
never be run near the analog inputs. Avoid crossover of digital
DD
or the DV
DD
supply can come up first. While
–34–
and analog signals. Traces on opposite sides of the board should
run at right angles to each other. This will reduce the effects of
feedthrough through the board. A microstrip technique is by far
the best but is not always possible with a double-sided board. In
this technique, the component side of the board is dedicated to
ground planes while signals are placed on the solder side.
Good decoupling is important when using high resolution
ADCs. All analog supplies should be decoupled with 10 F
tantalum in parallel with 0.1 F ceramic capacitors to AGND.
To achieve the best from these decoupling components, they
have to be placed as close as possible to the device, ideally right
up against the device. All logic chips should be decoupled with
0.1 F disc ceramic capacitors to DGND. In systems where a
common supply voltage is used to drive both the AV
DV
AV
mended analog supply decoupling capacitors between the AV
pin of the AD7730 and AGND and the recommended digital
supply decoupling capacitor between the DV
AD7730 and DGND.
Evaluating the AD7730 Performance
A recommended layout for the AD7730 is outlined in the evalu-
ation board for the AD7730. The evaluation board package
includes a fully assembled and tested evaluation board, docu-
mentation, software for controlling the board over the printer
port of a PC and software for analyzing the AD7730’s perfor-
mance on the PC. The evaluation board order number is
EVAL-AD7730EB.
Noise levels in the signals applied to the AD7730 may also
affect performance of the part. The AD7730 allows two tech-
niques for evaluating the true performance of the part, indepen-
dent of the analog input signal. These schemes should be used
after a calibration has been performed on the part.
The first method is to select the AIN1(–)/AIN1(–) input chan-
nel arrangement. In this case, the differential inputs to the
AD7730 are internally shorted together to provide a zero differ-
ential voltage for the analog modulator. External to the device,
the AIN1(–) input should be connected to a voltage which is
within the allowable common-mode range of the part.
The second scheme is to evaluate the part with a voltage near
input full scale. This can be achieved by again using input pair
AIN1(–), but by adding a differential voltage via the TARE
DAC. This allows the user to evaluate noise performance with a
near full-scale voltage.
The software in the evaluation board package allows the user to
look at the noise performance in terms of counts, bits and nV.
Once the user has established that the noise performance of the
part is satisfactory in this mode, an external input voltage can
then be applied to the device incorporating more of the signal
chain.
DD
DD
of the AD7730, it is recommended that the system’s
supply is used. This supply should have the recom-
DD
pin of the
DD
and
REV. A
DD