AD7706BRZ Analog Devices Inc, AD7706BRZ Datasheet - Page 6
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AD7706BRZ
Manufacturer Part Number
AD7706BRZ
Description
IC,Data Acquisition Signal Conditioner,3-CHANNEL,16-BIT,CMOS,SOP,16PIN,PLASTIC
Manufacturer
Analog Devices Inc
Datasheet
1.AD7705BRUZ.pdf
(44 pages)
Specifications of AD7706BRZ
Number Of Bits
16
Sampling Rate (per Second)
500
Data Interface
DSP, MICROWIRE™, QSPI™, Serial, SPI™
Number Of Converters
1
Power Dissipation (max)
1mW
Voltage Supply Source
Single Supply
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
16-SOIC (0.300", 7.50mm Width)
Number Of Elements
1
Resolution
16Bit
Architecture
Delta-Sigma
Sample Rate
0.5KSPS
Input Polarity
Unipolar/Bipolar
Input Type
Voltage
Differential Input
Yes
Power Supply Requirement
Single
Single Supply Voltage (typ)
3/5V
Single Supply Voltage (min)
2.7V
Single Supply Voltage (max)
5.25V
Dual Supply Voltage (typ)
Not RequiredV
Dual Supply Voltage (min)
Not RequiredV
Dual Supply Voltage (max)
Not RequiredV
Power Dissipation
1mW
Integral Nonlinearity Error
±0.003%FSR
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
16
Package Type
SOIC W
Input Signal Type
Pseudo-Differential
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
EVAL-AD7706EBZ - BOARD EVALUATION FOR AD7706
Lead Free Status / Rohs Status
Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AD7706BRZ
Manufacturer:
ADI/亚德诺
Quantity:
20 000
Company:
Part Number:
AD7706BRZ-REEL
Manufacturer:
TI/NSC
Quantity:
8 720
Part Number:
AD7706BRZ-REEL
Manufacturer:
ADI/亚德诺
Quantity:
20 000
AD7705/AD7706
Parameter
LOGIC INPUTS
LOGIC OUTPUTS (Including MCLK OUT)
SYSTEM CALIBRATION
AIN Input Sampling Rate, f
Reference Input Range
Input Current
All Inputs, Except SCLK and MCLK IN
SCLK Only (Schmitt-Triggered Input)
SCLK Only (Schmitt-Triggered Input)
MCLK IN Only
MCLK IN Only
Output Low Voltage, V
Output Low Voltage, V
Output High Voltage, V
Output High Voltage, V
Floating State Leakage Current
Floating State Output Capacitance
Data Output Coding
Positive Full-Scale Limit
Negative Full-Scale Limit
Offset Limit
Input Span
REF IN(+) − REF IN(−) Voltage
REF IN(+) − REF IN(−) Voltage
REF IN Input Sampling Rate, f
All Inputs, Except MCLK IN
MCLK IN
Input Low Voltage, V
Input High Voltage, V
V
V
V
V
V
V
Input Low Voltage, V
Input High Voltage, V
Input Low Voltage, V
Input High Voltage, V
T+
T−
T+
T+
T−
T+
− V
− V
T−
T−
16
15
OL
OL
15
INL
INL
INL
OH
OH
15
INH
INH
INH
S
S
14
B Version
Gain × f
f
1/1.75
1/3.5
f
±1
±10
0.8
0.4
2.0
1.4/3
0.8/1.4
0.4/0.8
1/2
0.4/1.1
0.375/0.8
0.8
3.5
0.4
2.5
0.4
0.4
4
V
±10
9
Binary
Offset binary
(1.05 × V
−(1.05 × V
−(1.05 × V
(0.8 × V
(2.1 × V
CLKIN
CLKIN
DD
− 0.6
/8
/64
REF
REF
CLKIN
REF
)/gain
)/gain
REF
REF
1
)/gain
/64
)/gain
)/gain
Rev. C | Page 6 of 44
Unit
V min/V max
V min/V max
μA max
μA max
V max
V max
V min
V min/V max
V min/V max
V min/V max
V min/V max
V min/V max
V min/V max
V max
V min
V max
V min
V max
V max
V min
V min
μA max
pF typ
V max
V max
V max
V min
V max
Typically ±20 nA
Conditions/Comments
For gains of 1 to 4
For gains of 8 to 128
V
V
V
V
Typically ±2 μA
V
V
V
V
V
V
V
I
I
I
I
Unipolar mode
Bipolar mode
Gain is the selected PGA gain (1 to 128)
Gain is the selected PGA gain (1 to 128)
Gain is the selected PGA gain (1 to 128)
Gain is the selected PGA gain (1 to 128)
Gain is the selected PGA gain (1 to 128)
SINK
SINK
SOURCE
SOURCE
DD
REF
DD
REF
DD
DD
DD
DD
DD
DD
DD
= 2.7 V to 3.3 V
= 4.75 V to 5.25 V
= 5 V
= 3 V
= 3 V and 5 V
= 5 V nominal
= 3 V nominal
= 5 V nominal
= 3 V nominal
= 800 μA, except for MCLK OUT;
= 100 μA, except for MCLK OUT;
= 1.225 ± 1% for specified performance
= 2.5 ± 1% for specified performance
= 200 μA, except for MCLK OUT;
= 100 μA, except for MCLK OUT;
13
13
V
V
13
13
DD
DD
V
V
DD
DD
= 3 V
= 5 V
= 5 V
= 3 V