AD7634BCPZRL Analog Devices Inc, AD7634BCPZRL Datasheet

IC,A/D CONVERTER,SINGLE,16-BIT,CMOS,LLCC,48PIN

AD7634BCPZRL

Manufacturer Part Number
AD7634BCPZRL
Description
IC,A/D CONVERTER,SINGLE,16-BIT,CMOS,LLCC,48PIN
Manufacturer
Analog Devices Inc
Series
PulSAR®r
Datasheet

Specifications of AD7634BCPZRL

Number Of Bits
18
Sampling Rate (per Second)
670k
Data Interface
Serial, Parallel
Number Of Converters
1
Power Dissipation (max)
225mW
Voltage Supply Source
Analog and Digital
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
48-VFQFN, CSP Exposed Pad
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
FEATURES
Multiple pins/software-programmable input ranges
Pins or serial SPI®-compatible input ranges/mode selection
Throughput
INL: ±1.5 LSB typical, ±2.5 LSB maximum (±9.5 ppm of FSR)
18-bit resolution with no missing codes
Dynamic range: 102.5 dB
SNR: 101 dB @ 2 kHz
THD: −112 dB @ 2kHz
iCMOS® process technology
5 V internal reference: typical drift 3 ppm/°C; TEMP output
No pipeline delay (SAR architecture)
Parallel (18-/16-/8-bit bus) and serial 5 V/3.3 V interface
SPI-/QSPI™-/MICROWIRE™-/DSP-compatible
Power dissipation
Pb-free, 48-lead LQFP and 48-Lead LFCSP (7 mm × 7 mm)
APPLICATIONS
CT scanners
High dynamic data acquisition
Σ-Δ replacement
Spectrum analysis
Medical instruments
Instrumentation
Process controls
GENERAL DESCRIPTION
The AD7634 is an 18-bit charge redistribution successive
approximation register (SAR), architecture analog-to-
digital converter (ADC) fabricated on Analog Devices, Inc. ’ s
iCMOS high voltage process. The device is configured through
hardware or via a dedicated write-only serial configuration port
for input range and operating mode. The AD7634 contains a
high speed 18-bit sampling ADC, an internal conversion clock,
an internal reference (and buffer), error correction circuits, and
both serial and parallel system interface ports. A falling edge on
CNVST samples the fully differential analog inputs on IN+ and
IN−. The AD7634 features four different analog input ranges and
three different sampling modes. Operation is specified from
−40°C to +85°C.
Rev. A
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.
5 V (10 V p-p), +10 V (20 V p-p), ±5 V (20 V p-p),
670 kSPS (warp mode)
570 kSPS (normal mode)
450 kSPS (impulse mode)
180 mW @ 670 kSPS, warp mode
28 mW @ 100 kSPS, impulse mode
10 mW @ 1 kSPS, impulse mode
±10 V (40 V p-p)
Programmable Input PulSAR
Input Type
Bipolar
Differential
Bipolar
Unipolar
Bipolar
Differential
Unipolar
Simultaneous/
Multichannel
Unipolar
Differential
Unipolar
Differential
Bipolar
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
Fax: 781.461.3113
PDBUF
Table 1. 48-Lead PulSAR Selection
PDREF
CNVST
RESET
AGND
AVDD
18-Bit, 670 kSPS, Differential
IN+
IN–
PD
TEMP
WARP IMPULSE BIPOLAR TEN
REF
CALIBRATION CIRCUITRY
FUNCTIONAL BLOCK DIAGRAM
REFBUFIN
CONTROL LOGIC AND
REF
AMP
14
16
Res
(Bits)
14
16
16
16
18
18
©2007–2011 Analog Devices, Inc. All rights reserved.
SWITCHED
CAP DAC
REF REFGND
CLOCK
100 to
250
(kSPS)
AD7651
AD7660
AD7661
AD7610
AD7663
AD7675
AD7678
AD7631
Figure 1.
VCC VEE
500 to
570
(kSPS)
AD7650
AD7652
AD7664
AD7666
AD7665
AD7676
AD7654
AD7655
AD7679
CONFIGURATION
MODE0
SERIAL DATA
INTERFACE
PARALLEL
AD7634
SERIAL
PORT
PORT
DVDD
MODE1
570 to
1000
(kSPS)
AD7951
AD7952
AD7653
AD7667
AD7612
AD7671
AD7677
AD7674
AD7634
AD7634
www.analog.com
DGND
18
®
OVDD
OGND
ADC
D[17:0]
BUSY
RD
CS
D0/OB/2C
D2/A1
D1/A0
>1000
(kSPS)
AD7621
AD7622
AD7623
AD7641
AD7643

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AD7634BCPZRL Summary of contents

Page 1

FEATURES Multiple pins/software-programmable input ranges 5 V (10 V p-p), +10 V (20 V p-p), ±5 V (20 V p-p), ±10 V (40 V p-p) Pins or serial SPI®-compatible input ranges/mode selection Throughput 670 kSPS (warp mode) 570 kSPS (normal ...

Page 2

AD7634 TABLE OF CONTENTS Features .............................................................................................. 1 Applications....................................................................................... 1 General Description ......................................................................... 1 Functional Block Diagram .............................................................. 1 Revision History ............................................................................... 2 Specifications..................................................................................... 3 Timing Specifications .................................................................. 5 Absolute Maximum Ratings............................................................ 7 ESD Caution.................................................................................. 7 Pin Configuration and Function Descriptions............................. ...

Page 3

SPECIFICATIONS AVDD = DVDD = 5 V; OVDD = 2 5.5 V; VCC = 15 V; VEE = − Table 2. Parameter RESOLUTION ANALOG INPUTS Differential Voltage Range ...

Page 4

AD7634 Parameter INTERNAL REFERENCE Output Voltage Temperature Drift Line Regulation Long-Term Drift Turn-On Settling Time REFERENCE BUFFER REFBUFIN Input Voltage Range EXTERNAL REFERENCE Voltage Range Current Drain TEMPERATURE PIN Voltage Output Temperature Sensitivity Output Resistance DIGITAL INPUTS Logic Levels V ...

Page 5

TIMING SPECIFICATIONS AVDD = DVDD = 5 V; OVDD = 2 5.5 V; VCC = 15 V; VEE = − Table 3. Parameter CONVERSION AND RESET (See Figure 35 and Figure 36) Convert Pulse Width Time ...

Page 6

AD7634 Parameter SLAVE SERIAL/SERIAL CONFIGURATION INTERFACE MODES (See Figure 44, Figure 45, and Figure 47) External SDCLK, SCCLK Setup Time External SDCLK Active Edge to SDOUT Delay SDIN/SCIN Setup Time SDIN/SCIN Hold Time External SDCLK/SCCLK Period External SDCLK/SCCLK High External ...

Page 7

ABSOLUTE MAXIMUM RATINGS Table 5. Parameter Rating Analog Inputs/Outputs 1 1 IN+ , IN− to AGND VEE − 0 VCC + 0.3 V REF, REFBUFIN, TEMP, AVDD + 0 REFGND to AGND AGND − 0.3 V ...

Page 8

AD7634 PIN CONFIGURATION AND FUNCTION DESCRIPTIONS D4/DIVSCLK[0] D5/DIVSCLK[1] NOTES 1. FOR THE LEAD FRAME CHIP SCALE PACKAGE (LFCSP), THE EXPOSED PAD SHOULD BE CONNECTED TO VEE. THIS CONNECTION IS NOT REQUIRED TO MEET THE ELECTRICAL PERFORMANCES. Table 6. Pin Function ...

Page 9

Pin No. Mnemonic Type Description 8 D1/A0 DI/O When MODE[1: this pin is Bit 1 of the parallel port data output bus. In all other modes, this input pin controls the form in which data is output ...

Page 10

AD7634 1 Pin No. Mnemonic Type Description 22 D11 or DI/O When MODE[1: this output is used as Bit 11 of the parallel port data output bus. SDCLK When MODE[1: Serial Data Clock. ...

Page 11

Pin No. Mnemonic Type Description 2 36 BIPOLAR DI Input Range Select. See description for Pin 30. 37 REF AO/I Reference Input/Output. When PDREF/PDBUF = low, the internal reference and buffer are enabled, produc- ing this ...

Page 12

AD7634 TYPICAL PERFORMANCE CHARACTERISTICS AVDD = DVDD = 5 V; OVDD = 5 V; VCC = 15 V; VEE = − 2.5 POSITIVE INL = 1.40LSB NEGATIVE INL = –1.10LSB 2.0 1.5 1.0 0.5 0 –0.5 –1.0 –1.5 ...

Page 13

FREQUENCY (kHz) Figure 11. FFT 20 kHz, Bipolar 5 V Range, Internal Reference 100 98 SNR 96 94 ENOB SINAD ...

Page 14

AD7634 –100 –104 –108 ±5V –112 ±10V –116 –120 0V TO 10V –124 –128 –55 –35 – TEMPERATURE (°C) Figure 17. THD vs. Temperature 20 16 ZERO/OFFSET ERROR –4 –8 NEGATIVE FULL-SCALE ERROR ...

Page 15

PD = PDBUF = PDREF = HIGH 600 500 400 VEE, –15V VCC, +15V DVDD 300 OVDD AVDD 200 100 0 –55 –35 – TEMPERATURE (°C) Figure 23. Power-Down Operating Currents vs. Temperature 50 45 ...

Page 16

AD7634 TERMINOLOGY Least Significant Bit (LSB) The least significant bit, or LSB, is the smallest increment that can be represented by a converter. For a fully differential input ADC with N bits of resolution, the LSB expressed in volts is ...

Page 17

THEORY OF OPERATION IN+ MSB 131,072C REF REFGND 131,072C 65,536C MSB IN– OVERVIEW The AD7634 is a very fast, low power, precise, 18-bit ADC using successive approximation capacitive digital-to-analog (CDAC) architecture. The AD7634 can be configured at any time for ...

Page 18

AD7634 Warp Mode Setting WARP = high and IMPULSE = low allows the fastest conversion rate 670 kSPS. However, in this mode, the full-specified accuracy is guaranteed only when the time between conversions does not exceed 1 ...

Page 19

TYPICAL CONNECTION DIAGRAM Figure 27 shows a typical connection diagram for the AD7634 using the internal reference, serial data interface, and serial configuration port. Different circuitry from that shown in Figure 27 is optional and is discussed in the following ...

Page 20

AD7634 ANALOG INPUTS Input Range Selection In parallel mode and serial hardware mode, the input range is selected by using the BIPOLAR (bipolar) and TEN (10 V range) inputs. See Table 6 for pin details; see the Hardware Configuration section ...

Page 21

DRIVER AMPLIFIER CHOICE Although the AD7634 is easy to drive, the driver amplifier must meet the following requirements: • For multichannel, multiplexed applications, the driver ampli- fier and the AD7634 analog input circuit must be able to settle for a ...

Page 22

AD7634 This circuit can also be made discretely, and thus more flexible, using any of the recommended low noise amplifiers in Table 9. Again, to preserve the SNR of the converter, the resistors, R and R , should be kept ...

Page 23

Digital Output Supply The OVDD supplies the digital outputs and allows direct interface with any logic working between 2.3 V and 5.25 V. OVDD should be set to the same level as the system interface. Sufficient decoup- ling is required ...

Page 24

AD7634 INTERFACES DIGITAL INTERFACE The AD7634 has a versatile digital interface that can be set up as either a serial or a parallel interface with the host system. The serial interface is multiplexed on the parallel data bus. The AD7634 ...

Page 25

Interface (Master or Slave) The 18-bit interface is selected by setting MODE[1: this mode, the data output is straight binary. 16-Bit and 8-Bit Interface (Master or Slave) In the 16-bit (MODE[1: and 8-bit (MODE[1:0] ...

Page 26

AD7634 CS, RD CNVST BUSY t 17 SYNC SDCLK t 18 SDOUT Figure 41. Master Serial Data Timing for Reading (Read Previous Conversion During Convert) CS CNVST BUSY ...

Page 27

SLAVE SERIAL INTERFACE The pins multiplexed on D[13:6] used for slave serial inter- face are: EXT/ INT , INVSCLK, SDIN, SDOUT, SDCLK, and RDERROR. External Clock (MODE[1: EXT/ INT = High) Setting the EXT/ INT = high allows ...

Page 28

AD7634 External Clock Data Read After/During Conversion It is also possible to begin to read data after conversion and continue to read the last bits after a new conversion is initiated. This method allows the full throughput and the use ...

Page 29

HARDWARE CONFIGURATION The AD7634 can be configured at any time with the dedicated hardware pins WARP, IMPULSE, BIPOLAR, TEN, D0/OB and PD for parallel mode (MODE[1: serial hardware mode (MODE[1: ...

Page 30

AD7634 WARP = BIPOLAR = IMPULSE = TEN = CNVST BUSY t 31 SCCS t 31 SCCLK SCIN X START BIPOLAR t 33 MICROPROCESSOR ...

Page 31

APPLICATION INFORMATION LAYOUT GUIDELINES While the AD7634 has very good immunity to noise on the power supplies, exercise care with the grounding layout. To facili- tate the use of ground planes that can be easily separated, design the printed circuit ...

Page 32

... MAX 0.85 0.80 SEATING PLANE ORDERING GUIDE 1 Model Notes Temperature Range AD7634BCPZ −40°C to +85°C AD7634BCPZRL −40°C to +85°C AD7634BSTZ −40°C to +85°C AD7634BSTZRL −40°C to +85°C 2 EVAL-AD7634CBZ 3 EVAL-CONTROL BRD3 RoHS Compliant Part. 2 This board can be used as a standalone evaluation board or in conjunction with the EVAL-CONTROL BRD3 for evaluation/demonstration purposes. ...

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