AD75004KNZ Analog Devices Inc, AD75004KNZ Datasheet - Page 2

QUAD 12-BIT DAC, PDIP IC

AD75004KNZ

Manufacturer Part Number
AD75004KNZ
Description
QUAD 12-BIT DAC, PDIP IC
Manufacturer
Analog Devices Inc
Datasheet

Specifications of AD75004KNZ

Settling Time
4µs
Number Of Bits
12
Data Interface
Parallel
Number Of Converters
4
Voltage Supply Source
Dual ±
Power Dissipation (max)
720mW
Operating Temperature
0°C ~ 70°C
Mounting Type
Through Hole
Package / Case
24-DIP (0.600", 15.24mm)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Parameter
DIGITAL INPUTS (D0–D7, A0–A3, CS, WR)
ACCURACY
CHANNEL-TO-CHANNEL MISMATCH
DYNAMIC PERFORMANCE
ANALOG OUTPUTS
VOLTAGE REFERENCE
POWER SUPPLY GAIN SENSITIVITY
POWER SUPPLY REQUIREMENTS
TEMPERATURE RANGE
NOTES
1
2
3
4
Specifications subject to change without notice.
AD75004–SPECIFICATIONS
Gain and bipolar zero errors are measured using internal voltage reference and include its errors.
Digital crosstalk is defined as the change in any one output’s steady state value as a result of any other output being driven from V
2 k
The internal voltage reference is intended to drive on-chip only; buffer it if using it externally.
All minimum and maximum specifications are guaranteed, and specifications shown in boldface are tested on all production units at final electrical test. Results from
those tests are used to calculate outgoing quality levels.
Logic Levels (TTL Compatible)
Input Capacitance
Resolution
Integral Linearity Error
Differential Linearity Error
Gain (Full-Scale) Error
Bipolar Zero Error
Integral Linearity Error
Gain Error
Bipolar Zero Error
Settling Time to 0.01% of FSR
Slew Rate, 2 k
Digital Input Crosstalk (Static)
Full-Scale Range (FSR)
Output Current
Short Circuit Limit Current
Reference Output Voltage
Temperature Coefficient
Reference Output Currents
Reference Input Voltage
Reference Input Current @ 5.0 V
Voltage Range
Supply Currents
Specification
Storage
Gain/ V
Gain/ V
Input Voltage, Logic “1”
Input Voltage, Logic “0”
Input Current, V
Input Current, V
Integral Linearity Error, T
Differential Linearity Error, T
Gain Error Drift, T
Bipolar Zero Error Drift, T
for FSR Change, 2 k
500 pF load by means of varying the digital input code.
DD
SS
1
, V
, V
SS
DD
= –10.8 to –13.2 V dc
500 pF Load
1
1
= +10.8 to +13.2 V dc
IH
IL
= 0.8 V
= 5.5 V
MIN
1
to T
500 pF Load
3
MIN
MIN
MAX
2
MIN
to T
to T
1
to T
MAX
MAX
1
MAX
1
1
Symbol
V
V
I
I
C
V
I
V
V
I
V
I
T
IH
IL
OUT
REFIN
DD
(T
IH
IL
OUT
REFOUT
REFIN
DD
MIN
IN
A
, I
, V
= +25 C,
, T
SS
SS
MAX
–2–
12.0 V power supplies unless otherwise noted)
Min
2.0
0
5
4.97
3.0
4.5
0
–65
5
10.8
Guaranteed Monotonic
Typ
2
5.00
5.0
5.0
1/4
1/2
1/2
2
15
1
3
1/2
1
1
5
15
15
15
12
25
5.5
0.8
10
10
10
12
4
–50
5.03
5.5
3.0
+70
+150
Max
3/4
30
7
25
1/2
3/4
10
2
1
4
2
40
25
25
13.2
30
OUTMIN
to V
OUTMAX
Units
V
V
pF
Bits
LSB
LSB
LSB
LSB
ppm/ C
LSB
ppm/ C
LSB
LSB
LSB
V/ s
dB
V
mA
mA
V
ppm/ C
mA
V
mA
ppm of FSR/%
ppm of FSR/%
V
mA
C
C
A
A
s
into a
REV. A

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