AD7266BCPZ-REEL Analog Devices Inc, AD7266BCPZ-REEL Datasheet - Page 12

• Manufacturer Part Number: AD7266BCPZ-REEL
• Description: IC,Data Acquisition System,6-CHANNEL,12-BIT,LLCC,32PIN,PLASTIC
• Manufacturer: Analog Devices Inc

Specifications of AD7266BCPZ-REEL

• Design Resources: AD7266 SAR ADC in DC-Coupled Differential and Single-Ended Appls (CN0039)
• Number Of Bits: 12
• Sampling Rate (per Second): 2M
• Data Interface: DSP, MICROWIRE™, QSPI™, Serial, SPI™
• Number Of Converters: 2
• Power Dissipation (max): 33.6mW
• Voltage Supply Source: Analog and Digital
• Operating Temperature: -40°C ~ 125°C
• Mounting Type: Surface Mount
• Package / Case: 32-VFQFN, CSP Exposed Pad
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: EVAL-AD7266CBZ - BOARD EVALUATION FOR AD7266
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

AD7266
The AD7266 is tested using the CCIF standard where two input
frequencies near the top end of the input bandwidth are used.
In this case, the second-order terms are usually distanced in
frequency from the original sine waves, while the third-order
terms are usually at a frequency close to the input frequencies.
As a result, the second-order and third-order terms are
specified separately. The calculation of the intermodulation
distortion is as per the THD specification, where it is the ratio
of the rms sum of the individual distortion products to the rms
amplitude of the sum of the fundamentals expressed in dBs.
Common-Mode Rejection Ratio (CMRR)
CMRR is defined as the ratio of the power in the ADC output at
full-scale frequency, f, to the power of a 100 mV p-p sine wave
applied to the common-mode voltage of V
frequency f
where:
Pf is the power at frequency f in the ADC output.
Pf
S
is the power at frequency f
CMRR (dB) = 10 log(Pf/Pf
S
as
S
in the ADC output.
S
)
IN+
and V
IN−
of
Rev. A | Page 12 of 28
Power Supply Rejection Ratio (PSRR)
Variations in power supply affect the full-scale transition but
not the converter’s linearity. PSRR is the maximum change in
the full-scale transition point due to a change in power supply
voltage from the nominal value (see Figure 4).
Thermal Hysteresis
Thermal hysteresis is defined as the absolute maximum change
of reference output voltage after the device is cycled through
temperature from either
or
It is expressed in ppm by
where:
V
V
T_HYS−.
REF
REF
T_HYS+ = +25°C to T
T_HYS− = +25°C to T
(25°C) is V
(T_HYS) is the maximum change of V
V
HYS
(
ppm
)
REF
=
at 25°C.
V
REF
(
25
MAX
MIN
°
V
) C
REF
to +25°C
to +25°C
−
(
V
25
REF
°
) C
(
T
_
HYS
REF
at T_HYS+ or
)
×
10
6