AD7228ACRZ Analog Devices Inc, AD7228ACRZ Datasheet - Page 6

• Manufacturer Part Number: AD7228ACRZ
• Description: OCTAL 8-BIT 5-15V DAC IC
• Manufacturer: Analog Devices Inc

Specifications of AD7228ACRZ

• Settling Time: 5µs
• Number Of Bits: 8
• Data Interface: Parallel
• Number Of Converters: 8
• Voltage Supply Source: Dual ±
• Power Dissipation (max): 310mW
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 24-SOIC (7.5mm Width)
• Number Of Channels: 8
• Resolution: 8b
• Conversion Rate: 200KSPS
• Interface Type: Parallel
• Single Supply Voltage (typ): 5/15V
• Dual Supply Voltage (typ): -5/12/-5/15V
• Architecture: R-2R
• Power Supply Requirement: Single/Dual
• Output Type: Voltage
• Integral Nonlinearity Error: ±2LSB
• Single Supply Voltage (min): 4.75/13.5V
• Single Supply Voltage (max): 5.25/16.5V
• Dual Supply Voltage (min): -4.5/10.8V
• Dual Supply Voltage (max): -5.5/16.5V
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 24
• Package Type: SOIC W
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

AD7228A
BIPOLAR OUTPUT OPERATION
Each of the DACs on the AD7228A can be individually config-
ured for bipolar output operation. This is possible using one ex-
ternal amplifier and two resistors per channel. Figure 8 shows a
circuit used to implement offset binary coding (bipolar opera-
tion) with DAC1 of the AD7228A. In this case
where D
latch 1 of the AD7228A. (0 D
With R1 = R2
V
DAC Latch Contents
MSB
1 1 1 1
1 0 0 0
1 0 0 0
0 1 1 1
0 0 0 0
0 0 0 0
Note: 1 LSB = (V
OUT
DAC Latch Contents
MSB
1 1 1 1
1 0 0 0
1 0 0 0
0 1 1 1
0 0 0 0
0 0 0 0
1
V
is a fractional representation of the digital word in
= (2D
OUT
Figure 8. Bipolar Output Circuit
1
Table II. Unipolar Code Table
Table III. Bipolar Code Table
1 1 1 1
0 0 0 1
0 0 0 0
1 1 1 1
0 0 0 1
0 0 0 0
– 1) • (V
1 1 1 1
0 0 0 1
0 0 0 0
1 1 1 1
0 0 0 1
0 0 0 0
1
REF
LSB
LSB
)(2
R2
R1
–8
) = V
REF
• D
REF
)
1
•V
1
256
REF
1
Analog Output
0 V
255/256)
Analog Output
0 V
–V
–V
–V
V
V
V
V
V
V
V
REF
REF
REF
REF
REF
REF
REF
REF
REF
REF
–
R2
R1
127
128
128
128
127
128
128
128
256
129
256
128
256
127
256
256
255
1
1
1
• V
REF
–V
V
REF
REF
2
–6–
Mismatch between R1 and R2 causes gain and offset errors, and
therefore, these resistors must match and track over temperature.
Once again, the AD7228A can be operated from single supply
or from dual supplies. Table III shows the digital code versus
output voltage relationship for the circuit of Figure 8 with
R1 = R2.
AC REFERENCE SIGNAL
In some applications it may be desirable to have an ac signal ap-
plied as the reference input to the AD7228A. The AD7228A
has multiplying capability within the upper (+10 V) and lower
(+2 V) limits of reference voltage when operated with dual sup-
plies. Therefore, ac signals need to be ac coupled and biased up
before being applied to the reference input. Figure 9 shows a
sine-wave signal applied to the reference input of the AD7228A.
For input frequencies up to 50 kHz, the output distortion typi-
cally remains less than 0.1%. The typical 3 dB bandwidth for
small signal inputs is 800 kHz.
TIMING DESKEW
A common problem in ATE applications is the slowing or
“rounding-off” of signal edges by the time they reach the
pin-driver circuitry. This problem can easily be overcome by
“squaring-up” the edge at the pin-driver. However, since each
edge will not have been “rounded-off” by the same extent, this
“squaring-up” could lead to incorrect timing relationship be-
tween signals. This effect is shown in Figure 10a.
The circuit of Figure 10b shows how two DACs of the
AD7228A can help in overcoming this problem. The same two
signals are applied to this circuit as were applied in Figure 10b.
The output of each DAC is applied to one input of a high-speed
comparator, and the signals are applied to the other inputs.
Varying the output voltage of the DAC effectively varies the
trigger point at which the comparator flips. Thus the timing re-
lationship between the two signals can be programmably cor-
rected (or deskewed) by varying the code to the DAC of the
AD7228A. In a typical application, the code is loaded to the
Figure 10a. Time Skewing Due to Slowing of Edges
Figure 9. Applying a AC Signal to the AD7228A
REV. A