AD711KR-REEL7 Analog Devices Inc, AD711KR-REEL7 Datasheet - Page 7

• Manufacturer Part Number: AD711KR-REEL7
• Description: IC,Operational Amplifier,SINGLE,BIPOLAR/JFET,SOP,8PIN,PLASTIC
• Manufacturer: Analog Devices Inc

Specifications of AD711KR-REEL7

• Rohs Status: RoHS non-compliant
• Amplifier Type: J-FET
• Number Of Circuits: 1
• Slew Rate: 20 V/µs
• -3db Bandwidth: 4MHz
• Current - Input Bias: 15pA
• Voltage - Input Offset: 200µV
• Current - Supply: 2.5mA
• Current - Output / Channel: 25mA
• Voltage - Supply, Single/dual (±): 9 V ~ 36 V, ±4.5 V ~ 18 V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 8-SOIC (3.9mm Width)
• Output Type: -
• Gain Bandwidth Product: -

REV. E
OPTIMIZING SETTLING TIME
Most bipolar high-speed D/A converters have current outputs;
therefore, for most applications, an external op amp is required
for current-to-voltage conversion. The settling time of the
converter/op amp combination depends on the settling time of
the DAC and output amplifier. A good approximation is:
The settling time of an op amp DAC buffer will vary with the
noise gain of the circuit, the DAC output capacitance, and with
the amount of external compensation capacitance across the
DAC output scaling resistor.
Settling time for a bipolar DAC is typically 100 ns to 500 ns.
Previously, conventional op amps have required much longer
settling times than have typical state-of-the-art DACs; therefore,
the amplifier settling time has been the major limitation to a
high-speed voltage-output D-to-A function. The introduction
of the AD711/712 family of op amps with their 1 ms (to ± 0.01%
of final value) settling time now permits the full high-speed
capabilities of most modern DACs to be realized.
t
S
Total = (t
a. (Full-Scale Negative Transition)
S
DAC )
ADJUST
GAIN
2
+ (t
GND
R2
100
REF
REF
S
IN
AMP )
0.1 F
Figure 2. Settling Characteristics for AD711 with AD565A
2
–V
19.95k
REF
OUT
EE
10V
20k
0.1 F
Figure 1. ± 10 V Voltage Output Bipolar DAC
POWER
GND
V
CC
0.5mA
I
REF
AD565A
100
R1
MSB
BIPOLAR
OFFSET ADJUST
I
I
OUT
REF
DAC
(1)
= 4
BIPOLAR
CODE
LSB
9.95k
–7–
OFF
In addition to a significant improvement in settling time, the
low offset voltage, low offset voltage drift, and high open-loop
gain of the AD711 family assures 12-bit accuracy over the full
operating temperature range.
The excellent high-speed performance of the AD711 is shown
in the oscilloscope photos of Figure 2. Measurements were taken
using a low input capacitance amplifier connected directly to the
summing junction of the AD711 – both photos show the worst
case situation: a full-scale input transition. The DAC’s 4 kW
[10 kW 8 kW = 4.4 kW] output impedance together with a 10 kW
feedback resistor produce an op amp noise gain of 3.25. The
current output from the DAC produces a 10 V step at the op
amp output (0 to –10 V Figure 2a, –10 V to 0 V Figure 2b.)
Therefore, with an ideal op amp, settling to ± 1/2 LSB (± 0.01%)
requires that 375 mV or less appears at the summing junction.
This means that the error between the input and output (that
voltage which appears at the AD711 summing junction) must
be less than 375 mV. As shown in Figure 2, the total settling time
for the AD711/AD565 combination is 1.2 microseconds.
I
O
5k
5k
5k
DAC
OUT
20V
SPAN
10V
SPAN
b. (Full-Scale Positive Transition)
10pF
AD711K
+15V
–15V
0.1 F
0.1 F
–10V TO +10V
OUTPUT
AD711