AD5781BRUZ-REEL7 Analog Devices Inc, AD5781BRUZ-REEL7 Datasheet - Page 19

• Manufacturer Part Number: AD5781BRUZ-REEL7
• Description: 18bit, 1LSB, Unbuffered Ref
• Manufacturer: Analog Devices Inc

Specifications of AD5781BRUZ-REEL7

• Design Resources: 18-Bit Accurate, low noise, precision bipolar DC voltage source (CN0177)
• Settling Time: 1µs
• Number Of Bits: 18
• Data Interface: DSP, MICROWIRE™, QSPI™, Serial, SPI™
• Number Of Converters: 1
• Voltage Supply Source: Analog and Digital, Dual ±
• Operating Temperature: -40°C ~ 125°C
• Mounting Type: Surface Mount
• Package / Case: 20-TSSOP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Power Dissipation (max): -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

THEORY OF OPERATION
The AD5781 is a high accuracy, fast settling, single, 18-bit,
serial input, voltage output DAC. It operates from a V
voltage of 7.5 V to 16.5 V and a V
Data is written to the AD5781 in a 24-bit word format via a 3-wire
serial interface. The AD5781 incorporates a power-on reset
circuit that ensures the DAC output powers up to 0 V with the
V
DAC ARCHITECTURE
The architecture of the AD5781 consists of two matched DAC
sections. A simplified circuit diagram is shown in Figure 46.
The six MSBs of the 18-bit data-word are decoded to drive 63
switches, E0 to E62. Each of these switches connects one of 63
matched resistors to either the V
remaining 12 bits of the data-word drive the S0 to S11 switches
of a 12-bit voltage mode R-R ladder network.
Table 7. Input Shift Register Format
MSB
DB23
R/W
Table 8. Decoding the Input Shift Register
R/W
X
0
0
0
0
1
1
1
1
X is don’t care.
1
OUT
pin clamped to AGND through a ~6 kΩ internal resistor.
Register Address
0
0
0
0
1
0
0
0
0
0
1
1
0
0
1
1
DB22
REFP
SS
supply of −16.5 V to −2.5 V.
or V
0
1
0
1
0
1
0
1
REFN
voltage. The
Description
No operation (NOP). Used in readback operations.
Write to the DAC register.
Write to the control register.
Write to the clearcode register.
Write to the software control register.
Read from the DAC register.
Read from the control register.
Read from the clearcode register.
Register address
DD
DB21
supply
Rev. 0 | Page 19 of 28
The AD5781 has a 3-wire serial interface ( SYNC , SCLK, and
SDIN) that is compatible with SPI, QSPI, and MICROWIRE
interface standards, as well as most DSPs (see
timing diagram).
Input Shift Register
The input shift register is 24 bits wide. Data is loaded into the
device MSB first as a 24-bit word under the control of a serial
clock input, SCLK, which can operate at up to 35 MHz. The
input register consists of a R/ W bit, three address bits, and
twenty data bits as shown in
this operation is shown in
V
V
V
V
REFPS
REFNF
REFNS
REFPF
DB20
2R
Figure 46. DAC Ladder Structure Serial Interface
2R
S0
12-BIT R-R LADDER
R
2R
S1
R
DB19
.....................
.....................
Figure 2
Table 7
2R
S11
.
R
. The timing diagram for
SIX MSBs DECODED INTO
Register data
63 EQUAL SEGMENTS
2R
E62
Figure 2
E61
2R
..........
..........
AD5781
2R
for a
E0
V
OUT
DB0
LSB