AD5764RBSUZ-REEL7 Analog Devices Inc, AD5764RBSUZ-REEL7 Datasheet - Page 24

• Manufacturer Part Number: AD5764RBSUZ-REEL7
• Description: QUAD 16-BIT +/-15V DAC
• Manufacturer: Analog Devices Inc

Specifications of AD5764RBSUZ-REEL7

• Design Resources: High Accuracy, Bipolar Voltage Output Digital-to-Analog Conversion Using AD5764 (CN0006)
• Settling Time: 8µs
• Number Of Bits: 16
• Data Interface: Serial
• Number Of Converters: 4
• Voltage Supply Source: Dual ±
• Power Dissipation (max): 275mW
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 32-TQFP, 32-VQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

AD5764R
REGISTERS
Table 9. Input Shift Register Format
MSB
DB23
R/W
Table 10. Input Shift Register Bit Function Descriptions
Register Bit
R/W
REG2, REG1, REG0
A2, A1, A0
Data
FUNCTION REGISTER
The function register is addressed by setting the three REG bits to 000. The values written to the address bits and the data bits determine
the function addressed. The functions available via the function register are outlined in Table 11 and Table 12.
Table 11. Function Register Options
REG2
0
0
0
0
Table 12. Explanation of Function Register Options
Option
NOP
Local Ground
Offset Adjust
D0, D1
Direction
D0, D1 Value
SDO Disable
Clear
Load
REG1
0
0
0
0
DB22
0
REG0
0
0
0
0
Description
No operation instruction used in readback operations.
Set by the user to enable the local ground offset adjust function. Cleared by the user to disable the local ground offset
adjust function (default). See the Design Features section for more information.
Set by the user to enable the D0 and D1 pins as outputs. Cleared by the user to enable the D0 and D1 pins as inputs (default).
See the Design Features section for more information.
I/O port status bits. Logic values written to these locations determine the logic outputs on the D0 and D1 pins when
configured as outputs. These bits indicate the status of the D0 and D1 pins when the I/O port is active as an input. When
enabled as inputs, these bits are don’t cares during a write operation.
Set by the user to disable the SDO output. Cleared by the user to enable the SDO output (default).
Addressing this function resets the DAC outputs to 0 V in twos complement mode and negative full scale in binary mode.
Addressing this function updates the DAC registers and consequently the analog outputs.
Description
Indicates a read from or a write to the addressed register
Used in association with the address bits, determines if a read or write operation is to the data register, offset register,
gain registers, or function register
REG2
0
0
0
1
1
Decodes the DAC channels
A2
0
0
0
0
1
Data bits
DB21
REG2
A2
0
0
1
1
A1
0
0
0
0
A0
0
1
0
1
DB20
REG1
REG1
0
1
1
0
0
A1
0
0
1
1
0
DB15 to DB6
Don’t care
DB19
REG0
Rev. B | Page 24 of 32
REG0
0
0
1
0
1
A0
0
1
0
1
0
DB5
Local ground
offset adjust
DB18
A2
DB4
D1
direction
DB17
A1
Clear, data = don’t care
Load, data = don’t care
NOP, data = don’t care
Function
Function register
Data register
Coarse gain register
Fine gain register
Offset register
Channel Address
DAC A
DAC B
DAC C
DAC D
All DACs
DB3
D1
value
DB16
A0
DB2
D0
direction
DB15 to DB1
DB1
D0
value
Data
DB0
SDO
disable
LSB
DB0