AD5227BUJZ10-RL7 Analog Devices Inc, AD5227BUJZ10-RL7 Datasheet - Page 10

IC,Digital Potentiometer,TSSOP,8PIN,PLASTIC

AD5227BUJZ10-RL7

Manufacturer Part Number
AD5227BUJZ10-RL7
Description
IC,Digital Potentiometer,TSSOP,8PIN,PLASTIC
Manufacturer
Analog Devices Inc
Datasheet

Specifications of AD5227BUJZ10-RL7

Taps
64
Resistance (ohms)
10K
Number Of Circuits
1
Temperature Coefficient
35 ppm/°C Typical
Memory Type
Volatile
Interface
Up/Down Counter
Voltage - Supply
2.7 V ~ 5.5 V
Operating Temperature
-40°C ~ 105°C
Mounting Type
Surface Mount
Package / Case
TSOT-23-8, TSOT-8
Resistance In Ohms
10K
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
AD5227BUJZ10RL7TR

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AD5227
THEORY OF OPERATION
The AD5227 is a 64-position 3-terminal digitally controlled
potentiometer device. It presets to a midscale at system power-
on. When CS is enabled, changing the resistance settings is
achieved by clocking the CLK pin. It is negative-edge triggered,
and the direction of stepping is determined by the state of the
U/ D input. When the wiper reaches the maximum or the
minimum setting, additional CLK pulses do not change the
wiper setting.
PROGRAMMING THE DIGITAL POTENTIOMETERS
Rheostat Operation
If only the W-to-B or W-to-A terminals are used as variable
resistors, the unused terminal can be opened or shorted with W.
This operation is called rheostat mode and is shown in Figure 26.
GND
CLK
U/D
CS
Figure 25. AD5227 Equivalent RDAC Circuit
Figure 26. Rheostat Mode Configuration
A
B
Figure 24. Functional Block Diagram
CTRL AND
UP/DOWN
DECODE
RDAC
D0
D1
D2
D3
D4
D5
AD5227
W
MIDSCALE
6-BIT UP/DOWN
POR
CONTROL
LOGIC
R
R
R
R
S
S
S
A
B
S
R
S
R
=
W
W
R
REGISTER
AB
WIPER
/64
V
DD
A
B
A
W
B
W
A
W
B
Rev. B | Page 10 of 16
The end-to-end resistance, R
by the wiper terminal, plus the B terminal contact, assuming
that R
R
U/ D pin. The change of R
of clock pulses, provided that the AD5227 has not reached its
maximum or minimum scale. ΔR
approximated as
where:
CP is the number of clock pulses.
R
R
the internal switch.
Since in the lowest end of the resistor string a finite wiper
resistance is present, care should be taken to limit the current
flow between W and B in this state to a maximum pulse current
of no more than 20 mA. Otherwise, degradation or possible
destruction of the internal switches can occur.
Similar to the mechanical potentiometer, the resistance of the
RDAC between the Wiper W and Terminal A also produces a
digitally controlled complementary resistance, R
terminals are used, the B terminal can be opened or shorted to
W. Similarly, ΔR
Equations 1 and 2 do not apply when CP = 0.
The typical distribution of the resistance tolerance from device
to device is process lot dependent. It is possible to have ±20%
tolerance.
Potentiometer Mode Operation
If all three terminals are used, the operation is called
potentiometer mode. The most common configuration is the
voltage divider operation as shown in Figure 27.
WB
AB
W
is the wiper resistance contributed by the on-resistance of
is the end-to-end resistance.
by one step. The direction is determined by the state of
Δ
Δ
WB
R
R
WB
WA
is used (see Figure 25). Clocking the CLK input steps,
=
=
Figure 27. Potentiometer Mode Configuration
±
±
CP
WA
(
64
×
can be approximated as
R
CP
V
64
AB
I
)
WB
+
R
64
R
AB
can be determined by the number
AB
W
A
B
, has 64 contact points accessed
+
R
WB
W
W
can, therefore, be
V
C
WA
. When these
(1)
(2)

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