AD5204BR10 Analog Devices Inc, AD5204BR10 Datasheet - Page 16
AD5204BR10
Manufacturer Part Number
AD5204BR10
Description
Digital Potentiometer (Pots) IC
Manufacturer
Analog Devices Inc
Datasheet
1.AD5204BRUZ50.pdf
(20 pages)
Specifications of AD5204BR10
Potentiometer Ic Case Style
SOIC
Peak Reflow Compatible (260 C)
No
End To End Resistance
10ohm
No. Of Pots
Quad
Leaded Process Compatible
No
No. Of Pins
24
Mounting Type
Surface Mount
Rohs Status
RoHS non-compliant
Taps
256
Resistance (ohms)
10K
Number Of Circuits
4
Temperature Coefficient
700 ppm/°C Typical
Memory Type
Volatile
Interface
SPI, 3-Wire Serial
Voltage - Supply
2.7 V ~ 5.5 V, ±2.3 V ~ 2.7 V
Operating Temperature
-40°C ~ 85°C
Package / Case
24-SOIC (7.5mm Width)
Resistance In Ohms
10K
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
AD5204BR10
Manufacturer:
AD
Quantity:
1 000
AD5204/AD5206
TEST CIRCUITS
Figure 27. Potentiometer Divider Nonlinearity Error Test Circuit (INL, DNL)
V+
I
MS
DUT
B
A
Figure 26. ESD Protection of Resistor Terminals
W
Figure 28. Resistor Position Nonlinearity Error
I
Figure 25. ESD Protection of Digital Pins
V+
W
Figure 29. Wiper Resistance Test Circuit
=
(Rheostat Operation; R-INL, R-DNL)
NO CONNECT
V
W
A, B, W
1V/R
V
MS
NOMINAL
340kΩ
DUT
DUT
A
B
A
B
W
W
V
SS
V
V+
R
WHERE V
AND V
SS
W
V
MS
=
V
LOGIC
V+ = V
1LSB = V+/256
W2
V
DD
W2
I
V
W
MS
W1
= V
– [V
DD
= V
MS
W1
MS
WHEN I
+ I
WHEN I
I
W
W
(R
W
AW
= 1/R
W
II R
= 0
BW
)]
Rev. C | Page 16 of 20
V+
Figure 30. Power Supply Sensitivity Test Circuit (PSS, PSRR)
Figure 32. Noninverting Programmable Gain Test Circuit
OFFSET
Figure 31. Inverting Programmable Gain Test Circuit
~
OFFSET
Figure 34. Incremental On-Resistance Test Circuit
OFFSET
GND
V
GND
GND
DD
Figure 33. Gain vs. Frequency Test Circuit
V
IN
A
B
V
DUT
A
W
B
DUT
W
A
V
IN
V
OFFSET BIAS
V
2.5V
OFFSET BIAS
MS
IN
V
DUT
SS
B
I
A
A
SW
W
TO V
CODE = 0x00
DUT
R
W
W
B
SW
DD
OP279
=
V+ = V
PSRR (dB) = 20 log
PSS (%/%) =
OP42
OP279
B
0.1V
I
+15V
–15V
SW
+
–
5V
DD
5V
0.1V
± 10%
∆V
∆V
V
V
MS
DD
OUT
OUT
V
%
%
OUT
(
∆V
∆V
MS
DD
)