AD1937WBSTZ-RL Analog Devices Inc, AD1937WBSTZ-RL Datasheet - Page 29

• Manufacturer Part Number: AD1937WBSTZ-RL
• Description: 4ADCs/8DACs W/PLL 192 KHz, 24Bt Codec
• Manufacturer: Analog Devices Inc
• Type: General Purposer

Specifications of AD1937WBSTZ-RL

• Data Interface: Serial
• Resolution (bits): 24 b
• Number Of Adcs / Dacs: 4 / 8
• Sigma Delta: Yes
• S/n Ratio, Adcs / Dacs (db) Typ: 96 / 96
• Dynamic Range, Adcs / Dacs (db) Typ: 105 / 110
• Voltage - Supply, Analog: 3 V ~ 3.6 V
• Voltage - Supply, Digital: 3 V ~ 3.6 V
• Operating Temperature: -40°C ~ 125°C
• Mounting Type: Surface Mount
• Package / Case: 64-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Table 25. DAC Control 1 Register (Address 3, 0x03)
Bit
0
2:1
3
4
5
6
7
Table 26. DAC Control 2 Register (Address 4, 0x04)
Bit
0
2:1
4:3
5
7:6
Table 27. DAC Individual Channel Mutes Register (Address 5, 0x05)
Bit
0
1
2
3
4
5
6
7
Value
0
1
00
01
10
11
0
1
0
1
0
1
0
1
0
1
Value
0
1
00
01
10
11
00
01
10
11
0
1
00
Value
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
Function
Latch in midcycle (normal)
Latch in at end of cycle (pipeline)
64 (2 channels)
128 (4 channels)
256 (8 channels)
512 (16 channels)
Left low
Left high
Slave
Master
Slave
Master
DBCLK pin
Internally generated
Normal
Inverted
Function
Unmute
Mute
Flat
48 kHz curve
44.1 kHz curve
32 kHz curve
24 bits
20 bits
Reserved
16 bits
Noninverted
Inverted
Reserved
Function
Unmute
Mute
Unmute
Mute
Unmute
Mute
Unmute
Mute
Unmute
Mute
Unmute
Mute
Unmute
Mute
Unmute
Mute
Rev. B | Page 29 of 36
Description
DBCLK active edge (TDM_IN)
DBCLKs per frame
DLRCLK polarity
DLRCLK master/slave
DBCLK master/slave
DBCLK source
DBCLK polarity
Description
Master mute
De-emphasis (32 kHz/44.1 kHz/48 kHz mode only)
Word width
DAC output polarity
Description
DAC1L mute
DAC1R mute
DAC2L mute
DAC2R mute
DAC3L mute
DAC3R mute
DAC4L mute
DAC4R mute
AD1937