5M160ZM100A5N Altera, 5M160ZM100A5N Datasheet - Page 32
5M160ZM100A5N
Manufacturer Part Number
5M160ZM100A5N
Description
ALTERA
Manufacturer
Altera
Series
MAX® Vr
Specifications of 5M160ZM100A5N
Programmable Type
In System Programmable
Delay Time Tpd(1) Max
7.5ns
Voltage Supply - Internal
1.71 V ~ 1.89 V
Number Of Logic Elements/blocks
160
Number Of Macrocells
128
Number Of Gates
-
Number Of I /o
79
Operating Temperature
-40°C ~ 125°C
Mounting Type
Surface Mount
Package / Case
100-TFBGA
Lead Free Status / Rohs Status
Vendor undefined / RoHS Compliant
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2–20
Figure 2–14. Global Clock Network
Notes to
(1) LAB column clocks in I/O block regions provide high fan-out output enable signals.
(2) LAB column clocks drive to the UFM block.
MAX V Device Handbook
I/O Block Region
LAB Column
Figure
clock[3..0]
2–14:
I/O Block Region
4
4
(Note 1)
4
4
4
CFM Block
UFM Block (2)
4
4
I/O Block Region
4
December 2010 Altera Corporation
Chapter 2: MAX V Architecture
LAB Column
clock[3..0]
Global Signals
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