24LC64T-I/ST Microchip Technology, 24LC64T-I/ST Datasheet - Page 10

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24LC64T-I/ST

Manufacturer Part Number
24LC64T-I/ST
Description
IC,SERIAL EEPROM,8KX8,CMOS,TSSOP,8PIN,PLASTIC
Manufacturer
Microchip Technology
Datasheet

Specifications of 24LC64T-I/ST

Rohs Compliant
YES
Format - Memory
EEPROMs - Serial
Memory Type
EEPROM
Memory Size
64K (8K x 8)
Speed
400kHz
Interface
I²C, 2-Wire Serial
Voltage - Supply
2.5 V ~ 5.5 V
Operating Temperature
-40°C ~ 85°C
Package / Case
8-TSSOP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
24LC64T-I/STG
24LC64T-I/STG
24LC64TI/ST

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24AA64/24LC64/24FC64
7.0
Since the device will not acknowledge during a write
cycle, this can be used to determine when the cycle is
complete (this feature can be used to maximize bus
throughput). Once the Stop condition for a Write
command has been issued from the master, the device
initiates the internally-timed write cycle and ACK polling
can then be initiated immediately. This involves the
master sending a Start condition followed by the control
byte for a Write command (R/W = 0). If the device is still
busy with the write cycle, then no ACK will be returned.
If no ACK is returned, the Start bit and control byte must
be re-sent. If the cycle is complete, the device will
return the ACK and the master can then proceed with
the next Read or Write command. See Figure 7-1 for a
flow diagram of this operation.
DS21189R-page 10
ACKNOWLEDGE POLLING
FIGURE 7-1:
Initiate Write Cycle
Send Control Byte
Write Command
with R/W = 0
Condition to
Acknowledge
Send Stop
Send Start
Did Device
(ACK = 0)?
Operation
Send
Next
ACKNOWLEDGE POLLING
FLOW
 2010 Microchip Technology Inc.
Yes
No

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