Si4731-A-EVB Silicon Laboratories Inc, Si4731-A-EVB Datasheet - Page 20

no-image

Si4731-A-EVB

Manufacturer Part Number
Si4731-A-EVB
Description
WiFi / 802.11 Modules & Development Tools Si4731 Eval Board
Manufacturer
Silicon Laboratories Inc
Datasheet

Specifications of Si4731-A-EVB

Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Si4730/31-A10
SDIO or GPO1. A transaction begins when the system
controller drives SEN = 0. The system controller then
pulses SCLK eight times, while driving an 8-bit control
byte serially on SDIO. The device captures the data on
rising edges of SCLK. The control byte must have one
of five values:
For write operations, the system controller must drive
exactly 8 data bytes (a command and seven arguments)
on SDIO after the control byte. The data is captured by
the device on the rising edge of SCLK.
For read operations, the controller must read exactly
one byte (STATUS) after the control byte or exactly 16
data bytes (STATUS and RESP1–RESP15) after the
control byte. The device changes the state of SDIO (or
GPO1, if specified) on the falling edge of SCLK. Data
must be captured by the system controller on the rising
edge of SCLK.
Keep SEN low until all bytes have transferred. A
transaction may be aborted at any time by setting SEN
high and toggling SCLK high and then low. Commands
will be ignored by the device if the transaction is
aborted.
For details on timing specifications and diagrams, refer
to Figure 6 and Figure 7 on page 10.
4.14. GPO Outputs
GPO2 can be configured to provide interrupts for seek
and tune complete, receive signal quality, and RDS.
GPO1 and GPO3 are not available on Si4730-A10 and
Si4731-A10.
20
0x48 = write a command (controller drives 8
additional bytes on SDIO).
0x80 = read a response (device drives one
additional byte on SDIO).
0xC0 = read a response (device drives 16 additional
bytes on SDIO).
0xA0 = read a response (device drives one
additional byte on GPO1).
0xE0 = read a response device drives 16 additional
bytes on GPO1).
Rev. 1.0
4.15. Firmware Upgrades
The Si4730/31 contains on-chip program RAM to
accommodate minor changes to the firmware. This
allows Silicon Labs to provide future firmware updates
to optimize the characteristics of new radio designs and
those already deployed in the field.
4.16. Reset, Powerup, and Powerdown
Setting the RST pin low will disable analog and digital
circuitry, reset the registers to their default settings, and
disable the bus. Setting the RST pin high will bring the
device out of reset.
A powerdown mode is available to reduce power
consumption when the part is idle. Putting the device in
powerdown mode will disable analog and digital circuitry
while keeping the bus active.
4.17. Programming with Commands
To ease development time and offer maximum
customization, the Si4730/31 provides a simple yet
powerful software interface to program the receiver. The
device is programmed using commands, arguments,
properties and responses.
To perform an action, the user writes a command byte
and associated arguments causing the chip to execute
the given command. Commands control an action such
as power up the device, shut down the device, or tune
to a station. Arguments are specific to a given command
and are used to modify the command. A complete list of
commands is available in Table 12, “Si473x Command
Summary,” on page 21.
Properties are a special command argument used to
modify the default chip operation and are generally
configured immediately after power-up. Examples of
properties are de-emphasis level, RSSI seek threshold,
and soft mute attenuation threshold. A complete list of
properties is available in Table 13, “Si473x Property
Summary,” on page 21.
Responses provide the user information and are
echoed after a command and associated arguments are
issued. All commands provide a one-byte status update
indicating interrupt and clear-to-send status information.
For a detailed description of the commands and
properties for the Si4730/31, see “AN385: Si4730/31
AM/FM Receiver Programming Guide.”

Related parts for Si4731-A-EVB