Si4720-A-EVB Silicon Laboratories Inc, Si4720-A-EVB Datasheet
Si4720-A-EVB
Specifications of Si4720-A-EVB
Related parts for Si4720-A-EVB
Si4720-A-EVB Summary of contents
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... Applications Cellular handsets/hands-free MP3 players Portable media players Description The Si4720/21 integrates the complete tuner and transmit functions for FM broadcast reception and standards-compliant, unlicensed FM broadcast stereo transmission. Users must comply with local radio frequency (RF) transmission regulations. Functional Block Diagram Tx/Rx Ant ...
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... Si4720/21-B20 2 Rev. 1.0 ...
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... Pre-emphasis and De-emphasis . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33 5.21. RDS/RBDS Processor (Si4721 Only .33 5.22. Tuning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33 5.23. Reference Clock . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33 5.24. Control Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33 5.25. GPO Outputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35 5.26. Reset, Powerup, and Powerdown . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35 5.27. Programming with Commands . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35 6. Commands and Properties . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36 7. Pin Descriptions: Si4720/21- Si4720/21-B20 Rev. 1.0 Page 3 ...
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... Si4720/21-B20 8. Ordering Guide . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42 9. Package Markings (Top Marks 9.1. Top Mark Explanation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43 9.2. Si4720/21 Top Mark . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43 9.3. Si4721 Top Mark . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43 10. Package Outline: Si4720/21- 11. PCB Land Pattern: Si4720/21- .45 12. Additional Reference Resources . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47 Contact Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .48 4 Rev. 1.0 ...
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... Exposure beyond recommended operating conditions for extended periods may affect device reliability. 2. The Si4720/21 devices are high-performance RF integrated circuits with certain pins having an ESD rating of < HBM. Handling and assembly of these devices should only be done at ESD-protected workstations. ...
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... Si4720/21-B20 Table 3. DC Characteristics Parameter FM Receiver RX Supply Current 1 RX Supply Current RX Interface Supply Current 2 RX RDS Supply Current 2 RX Supply Current FM Transmitter TX Supply Current TX Interface Supply Current FM Transmitter from Digital Audio Input TX Supply Current TX Interface Supply Current FM Transmitter in Receive Power Scan Mode ...
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... Figure 1. Reset Timing Parameters for Busmode Select 1,2,3 = – °C) A Symbol 4 t SRST t HRST SRST t t HRST SRST 70% RST 30% 70% 30% 70% INT 30% Rev. 1.0 Si4720/21-B20 Min Typ Max Unit 100 — — 30 — — is only 30 ns. If GPO1 or GPO2 is hi-Z, then µ ...
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... RST. 3. When selecting 2-wire mode, the user must ensure that SCLK is high during the rising edge of RST, and stays high until after the first start condition. 4. The Si4720/21 delays SDIO by a minimum of 300 ns from the V t specification. ...
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... Figure 2. 2-Wire Control Interface Read and Write Timing Parameters SCLK A6-A0, SDIO R/W START ADDRESS + R/W Figure 3. 2-Wire Control Interface Read and Write Timing Diagram HIGH t r:IN f: HD:DAT SU:DAT D7-D0 ACK DATA ACK Rev. 1.0 Si4720/21-B20 t t SU:STO BUF t f:IN, STOP START t f:OUT D7-D0 DATA ACK STOP 9 ...
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... Si4720/21-B20 Table 6. 3-Wire Control Interface Characteristics (V = 2 1 Parameter SCLK Frequency SCLK High Time SCLK Low Time SDIO Input, SEN to SCLK↑ Setup SDIO Input to SCLK↑ Hold ↓ SEN Input to SCLK Hold SCLK↑ to SDIO Output Valid SCLK↑ to SDIO Output High Z ...
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... HSEN t Read CDV t Read CDZ HIGH LOW HSDIO t S C6– Control Byte In t CDV t HSDIO t S C6– Bus Turnaround Rev. 1.0 Si4720/21-B20 Min Typ Max Unit 0 — 2.5 MHz 25 — — — — — — — — — — — — ...
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... Si4720/21-B20 Table 8. Digital Audio Interface Characteristics (Receive 2.7 to 5.5 V, VIO = 1 Parameter DCLK Cycle Time DCLK pulse width high DCLK pulse width low DFS set-up time to DCLK rising edge DFS hold time from DCLK rising edge DOUT propagation delay from DCLK falling edge t ...
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... RDS BLER < 0.3 ±200 kHz ±400 kHz In-band –3 dB –3 dB FM_DEEMPHASIS = 2 FM_DEEMPHASIS = 1 R Single-ended L . AGC is disabled. Refer to "7. Pin Descriptions: Si4720/21-GM" on page 41. Rev. 1.0 Si4720/21-B20 Min Typ Max Unit 76 — 108 MHz — 2.2 3.5 µV EMF — ...
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... A Symbol Test Condition C Single-ended L RCLK tolerance = 100 ppm From powerdown Input levels of 8 and 60 dBµ Input . AGC is disabled. Refer to "7. Pin Descriptions: Si4720/21-GM" on page 41. Rev. 1.0 Min Typ Max Unit — — — — 80 ms/channel — ...
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... TX_PREMPHASIS = 75 µs TX_PREMPHASIS = 50 µs Δf = 22.5 kHz, Mono, limiter off Δf = 22.5 kHz, Δfpilot = 6.75 kHz, Stereo, limiter off Δ kHz, Mono, limiter off of 500 mVpk-pk at 100 kHz. DD Rev. 1.0 Si4720/21-B20 = 76–108 MHz. RF Min Typ Max Unit 76 — 108 MHz –3.5 — ...
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... Input Capacitance Received Noise Level Accuracy 2 (Si4720/21 Only) Notes transmitter performance specifications are subject to adherence to Silicon Laboratories guidelines in “AN383: Universal Antenna Selection and Layout Guidelines.” Silicon Laboratories will evaluate schematics and layouts for qualified customers. Tested with test schematic (L = 120 nH, Q > 30) shown in Figure 10 on page 19. ...
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... DIN Figure 9. Digital Audio Interface Timing Parameters – °C) A Symbol Test Condition t DCH t DCL t SU:DFS t HD:DFS t SU:DIN t HD:DIN SU:DFS t SU:DIN Rev. 1.0 Si4720/21-B20 Min Typ Max Unit 10 — — — — — — — — — — — — ns — — ...
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... Crystal Frequency Tolerance Board Capacitance Notes: 1. The Si4720/21 divides the RCLK input by REFCLK_PRESCALE to obtain REFCLK. There are some RCLK frequencies between 31.130 kHz and 40 MHz that are not supported. See “AN332: Si4704/05/06/1x/2x/3x/4x FM Transmitter/AM/FM/SW/LW/WB Receiver Programming Guide” for more details frequency tolerance of ±50 ppm is required for FM seek/tune using 50 kHz channel spacing. ...
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... To ensure proper operation and FM transmitter performance, follow the guidelines in “AN383 QFN Universal Layout Guide.” Silicon Laboratories will evaluate schematics and layouts for qualified customers. 4. LIN, RIN line inputs must be ac-coupled. 2.2. Test Circuit Bill of Materials Table 14. Si4720/21 Test Circuit Bill of Materials Component(s) C1 Supply bypass capacitor, 22 nF, 20%, Z5U/X7R C2 Coupling Capacitor, 0.47 µ ...
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... Silicon Laboratories will evaluate schematics and layouts for qualified customers. 4. LIN, RIN line inputs must be ac-coupled. 5. Dedicated RX antenna at FMI input optional. Figure 11. Analog Audio Inputs/Outputs (L 3.2. Typical Application Bill of Materials Table 15. Si4720/21 Typical Application Bill of Materials Component(s) C1 Supply bypass capacitor, 22 nF, 20%, Z5U/X7R C2 Coupling Capacitor, 0.47 µ ...
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... V IO 1.5 to 3.6 V Notes: 1. Si4720/21 is shown configured GPO2/INT can be configured for interrupts with the powerup command ensure proper operation and FM transmitter performance, follow the guidelines in “AN383: Si47xx QFN Universal Layout Guide.” Silicon Laboratories will evaluate schematics and layouts for qualified customers. ...
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... Si4720/21-B20 4. Universal AM/FM RX/FM TX Application Schematic Figure 13 shows an application schematic that supports the Si47xx family QFN products, including the Si4702/3/4/5 FM receivers, Si471x FM transmitters, Si472x FM transceivers, and Si473x AM/FM receivers Right Audio T 5 Left Audio Jack C4 L HEADPHONE 1 nF 270 nH System Component ...
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... Current limiting resistor, 2 kΩ, 0402 Current limiting resistor, 600 Ω, 0402 R18 L1 VCO filter inductor, 10 nH, 0603, Q>30, Murata, LQW18ANR01J00D C17 VCO filter capacitor, 3.3 pF, 0402, COG, Venkel, C0402COG2503R3JN Si4720/21-B20 Description Rev. 1.0 Note R12, R13, and R21 for Si4702/03 Only AM Ferrite Antenna AM Ferrite Antenna ...
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... The device operates in half duplex mode, meaning the transmitter and receiver do not operate at the same time. The Si4720/21 performs FM modulation in the digital domain to achieve high fidelity, optimal performance versus power consumption, and flexibility of design. The onboard DSP provides modulation adjustment and audio dynamic range control for optimum sound quality ...
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... These features can dramatically improve the end user’s listening experience. The Si4720/21 is reset by applying a logic low on the RST pin. This causes all register values to be reset to their default values. The digital input/output interface ...
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... Si4720/21-B20 5.4. Integrated Antenna Support The Si4720/21 is the first FM receiver to support the fast growing trend to integrate the FM receiver antenna into the device enclosure. The chip is designed with this function in mind from the outset, with multiple international patents pending, thus it is superior to many other options in price, board space, and performance ...
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... Stereo/mono status can be monitored with the FM_RSQ_STATUS command. Mono operation FM_BLEND_MONO_THRESHOLD property. Rev. 1.0 Si4720/21-B20 RIGHT CHANNEL 1 DCLK n-2 n MSB ...
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... Schematic" on page 20. This mode is enabled using the POWER_UP command. Refer to Table 21 "Si472x Property Summary". The Si4720/21 performance may be affected by data activity on the SDIO bus when using the integrated internal oscillator. SDIO activity results from polling the tuner for status or communicating with other devices ...
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... RDS frequency deviation of 0.0267 x 75 kHz = 2.0025 kHz for a total peak frequency deviation of 77.0025 kHz. In the Si4720/21, the peak audio, pilot, and RDS frequency deviations can be programmed directly with the Transmit commands with an accuracy of 10 Hz. For the example ...
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... RDS deviations of 2.0 kHz for a total peak frequency deviation of 77 kHz. The total peak transmit frequency deviation of the Si4720/21 can range from 0 to 100 kHz and is equal to the arithmetic sum of the Transmit Audio, Pilot, and RDS deviations. Users must comply with local regulations on radio frequency transmissions ...
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... MSB 5.17. Line Input The Si4720/21 provides left and right channel line inputs (LIN and RIN). The inputs are high-impedance and low- capacitance, suited to receiving line level signals from external audio baseband processors. Both line inputs are low-noise inputs with programmable attenuation. ...
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... The Si4720/21 has a programmable low audio level and high audio level indicators that allows the user to selectively enable and disable the carrier based on the presence of audio content. The TX_ASQ_LEVEL_LOW and TX_ASQ_LEVEL_HIGH parameters set the low level and high level thresholds in dBFS, respectively ...
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... Si4720/21 and receive responses from the device. The serial port can operate in three bus modes: 2-wire mode, SPI mode, or 3-wire mode. The Si4720/21 selects the bus mode by sampling the state of the GPO1 and GPO2/INT pins on the rising edge of RST. The GPO1 ...
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... SDIO or Si4720/21 has GPO1. The Si4720/21 changes the state of SDIO or GPO1 after the falling edges of SCLK. Data should be captured by the user on the rising edges of SCLK. After the status byte has been read, the user raises SEN after the last falling edge of SCLK to end the transaction ...
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... SCLK. For read operations, the control word is followed by a delay of one-half SCLK cycle for bus turnaround. Next, the Si4720/21 drives the 16-bit read data word serially on SDIO, changing the state of SDIO on each rising edge of SCLK. A transaction ends when the user sets SEN high, then pulses SCLK high and low one final time ...
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... Si4720/21-B20 6. Commands and Properties Table 20. Si472x Command Summary Cmd Name Transmit Commands 0x01 POWER_UP 0x10 GET_REV 0x11 POWER_DOWN 0x12 SET_PROPERTY 0x13 GET_PROPERTY 0x14 GET_INT_STATUS 0x15 PATCH_ARGS 0x16 PATCH_DATA 0x30 TX_TUNE_FREQ 0x31 TX_TUNE_POWER 0x32 TX_TUNE_MEASURE 0x33 TX_TUNE_STATUS 0x34 TX_ASQ_STATUS 0x35 TX_RDS_BUFF 0x36 ...
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... Default is 2 (limiter is enabled, audio dynamic range control is disabled). Sets the threshold level for audio dynamic range control. Default is –40 dB. Sets the attack time for audio dynamic range control. Default is 0 (0.5 ms). Rev. 1.0 Si4720/21-B20 Default 0x0000 0x0000 0x0000 0x8000 0x0001 ...
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... Si4720/21-B20 Table 21. Si472x Property Summary (Continued) Prop Name 0x2203 TX_ACOMP_RELEASE_TIME 0x2204 TX_ACOMP_GAIN 0x2205 TX_LIMITER_RELEASE_TIME 0x2300 TX_ASQ_INTERRUPT_SOURCE 0x2301 TX_ASQ_LEVEL_LOW 0x2302 TX_ASQ_DURATION_LOW 0x2303 TX_ASQ_LEVEL_HIGH 0x2304 TX_ASQ_DURATION_HIGH 0x2C00 TX_RDS_INTERRUPT_SOURCE 0x2C01 TX_RDS_PI 0x2C02 TX_RDS_PS_MIX 0x2C03 TX_RDS_PS_MISC 0x2C04 TX_RDS_PS_REPEAT_COUNT 0x2C05 TX_RDS_PS_MESSAGE_COUNT Si4721 Only. Number of PS messages in use. ...
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... SPACING FM_SEEK_TUNE_ 0x1403 SNR_THRESHOLD FM_SEEK_TUNE_ 0x1404 RSSI_TRESHOLD Si4720/21-B20 Description Sets frequency of reference clock in Hz. The range is 31130 to 34406 Hz disable the AFC. Default is 32768 Hz. Sets the prescaler value for RCLK input. Sets deemphasis time constant. Default is 75 µs. Sets RSSI threshold for stereo blend (Full stereo above threshold, blend below threshold) ...
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... Si4720/21-B20 Table 21. Si472x Property Summary (Continued) Prop Name 0x1500 RDS_INT_SOURCE RDS_INT_FIFO_ 0x1501 COUNT 0x1502 RDS_CONFIG 0x4000 RX_VOLUME 0x4001 RX_HARD_MUTE 40 Description Configures RDS interrupt behavior (Si4721 only). Sets the minimum number of RDS groups stored in the receive FIFO required before RDSRECV is set (Si4721 only) ...
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... Pin Descriptions: Si4720/21-GM NC FMI RFGND TXO RST Pin Number(s) Name FMI 3 RFGND 4 TXO 5 RST 6 SEN 7 SCLK 8 SDIO 9 RCLK 10 VIO 11 VDD 13 ROUT/DIN 14 LOUT/DFS 15 RIN/DOUT 16 LIN/DFS 17 GPO3/DCLK 18 GPO2/INT 19 GPO1 12, GND PAD GND RIN/DOUT 3 GND 14 LOUT/DFS PAD 4 13 ROUT/DIN 5 12 GND 6 11 VDD Description No connect ...
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... Si4720/21-B20 8. Ordering Guide Part Number* Si4720-B20-GM Broadcast FM Radio Transceiver for Portable Applica- tions Si4721-B20-GM Broadcast FM Radio Transceiver for Portable Applica- tions with RDS/RBDS Encoder/Decoder *Note: Add an “(R)” at the end of the device part number to denote tape and reel option; 2500 quantity per reel. ...
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... Circle = 0.5 mm Diameter (Bottom-Left Justified Year WW = ‘Workweek 9.2. Si4720/21 Top Mark 9.3. Si4721 Top Mark Si4720/21-B20 20 = Si4720 Si4721 20 = Firmware Revision 2 Revision B Die Internal tracking code. Pin 1 Identifier Assigned by the Assembly House. Corresponds to the last significant digit of the year and workweek of the mold date. ...
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... Si4720/21-B20 10. Package Outline: Si4720/21-GM Figure 26 illustrates the package details for the Si4720. Table 22 lists the values for the dimensions shown in the illustration. Figure 26. 20-Pin Quad Flat No-Lead (QFN) Symbol Millimeters Min Nom A 0.50 0.55 A1 0.00 0.02 b 0.20 0.25 c 0.27 0.32 D 3.00 BSC D2 1 ...
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... PCB Land Pattern: Si4720/21-GM Figure 27 illustrates the PCB land pattern details for the Si4720-GM. Table 23 lists the values for the dimensions shown in the illustration. Figure 27. PCB Land Pattern Rev. 1.0 Si4720/21-B20 45 ...
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... Si4720/21-B20 Table 23. PCB Land Pattern Dimensions Symbol Millimeters Min 2.10 Notes: General 1. All dimensions shown are in millimeters (mm) unless otherwise noted. 2. Dimensioning and tolerancing is per the ANSI Y14.5M-1994 specification. 3. This land pattern design is based on IPC-SM-782 guidelines. 4. All dimensions shown are at Maximum Material Condition (MMC). Least Material Condition (LMC) is calculated based on a fabrication allowance of 0 ...
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... Additional Reference Resources Si47xx Evaluation Board User’s Guide AN307: Si4712/13/20/21 Receive Power Scan AN332: Universal Programming Guide AN341: Si4720/21 Evalution Board Quick Start Guide AN383: Universal Antenna Selection and Layout Guidelines AN388: Universal Evaluation Board Test Procedure Si4720/21 Customer Support Site: This site contains all application notes, evaluation board schematics and layouts, and evaluation software ...
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... Si4720/21-B20 C I ONTACT NFORMATION Silicon Laboratories Inc. 400 West Cesar Chavez Austin, TX 78701 Tel: 1+(512) 416-8500 Fax: 1+(512) 416-9669 Toll Free: 1+(877) 444-3032 Email: FMinfo@silabs.com Internet: www.silabs.com The information in this document is believed to be accurate in all respects at the time of publication but is subject to change without notice. ...