AGLN-Z-NANO-KIT Actel, AGLN-Z-NANO-KIT Datasheet - Page 12

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AGLN-Z-NANO-KIT

Manufacturer Part Number
AGLN-Z-NANO-KIT
Description
MCU, MPU & DSP Development Tools IGLOO nano Starter Kit
Manufacturer
Actel
Datasheet

Specifications of AGLN-Z-NANO-KIT

Processor To Be Evaluated
AGLN250
Processor Series
IGLOO nano
Interface Type
USB
Maximum Operating Temperature
+ 70 C
Minimum Operating Temperature
- 20 C
Operating Supply Voltage
3.3 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Board Components and Settings
Jumper and Switch Settings
12
Recommended default jumper settings are defined in
highlighted in grey. Connect jumpers in the default settings described in
programmed demo design to function correctly.
Table 1-1 • Jumper Settings for Demo Design
Jumper
JP1
JP2
JP3
JP4
JP5
JP6
JP7
JP8
JP9
JP10
JP11
JP12
JP13
JP14
JP15
SW1
Default Setting
Pin 2-3
Pin 2-3
Pin 2-3
Pin 2-3
Pin 1-2
Pin 2-3
Pin 2-3
Pin 1-2
Pin 2-3
Pin 2-3
Pin 1-2
Pin 2-3
Pin 1-2
Pin 1-2
Pin 1-2
OFF
Main power supply. Connect Wall/USB input to VCC_IN.
VCC CORE voltage (1.2 / 1.5 V)
Pin 2-3 selects 1.2 V.
Pin 1-2 selects 1.5 V.
Jumper is on upper right area of board.
Current measurement header for Bank 0
Current measurement header for VCC_B2 (Bank 2)
Voltage selection for VCC B0 (Bank 0)
Pin 1-2 selects 3.3 V.
Pin 3-4 selects 2.5 V.
Pin 5-6 selects VCC_CORE.
Current measurement header for Bank 1
Current measurement header for VCC_B3 (Bank 3)
Voltage selection for VCC B1 (Bank 1)
Pin 1-2 selects 3.3 V.
Pin 3-4 selects 2.5 V.
Pin 5-6 selects VCC_CORE.
Current measurement header for JTAG supply.
Current measurement header for VCC (FPGA core supply).
Voltage selection for VCC JTAG (JTAG supply.
Pin 1-2 selects 3.3 V.
Pin 3-4 selects 2.5V.
Pin 5-6 selects VCC_CORE.
Current measurement header for VCC_PUMP (FPGA charge pump
supply)
Remove each short default jumper to disconnect any of the 8 LEDs from
the FPGA.
Remove each short default jumper to disconnect any of the 8 DIP switches
SW3.1 through SW3.8 from the FPGA.
By default, SW3.1 through SW3.8 should all be closed (set to the ON
settings).
The 8 DIP switches are connected to the 8 LEDs (LED1, LED2, … LED8).
Remove each short default jumper to disconnect any of the four push-
button switches, SW4 through SW7, from the FPGA.
Flash*Freeze: To enable Flash*Freeze mode, slide SW1 toward FF_ON.
In Flash*Freeze mode, current consumption of the FPGA goes below
50 µA. Current can be measured by placing a current meter between [pin1
or pin 2] and [pin 3 or pin 4] of JP10 (VCC_CORE).
R e visio n 2
Table
Comment
1-1. The voltage selection jumpers are
Table 1-1
to enable the pre-

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