EVB111-ISA SMSC, EVB111-ISA Datasheet - Page 3

• Manufacturer Part Number: EVB111-ISA
• Description: MCU, MPU & DSP Development Tools Evaluation Board
• Manufacturer: SMSC

Specifications of EVB111-ISA

• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Current Measurements and Measurement Procedures for the LAN91C111 and LAN91C111 Evaluation Board
SMSC AN 11.2
2.3.5
2.3.6
3 Measurement Results
3.1
3.1.1
NORMAL OPERATION MODE
LAN91C111 Stand-Alone Measurements
Procedure for Setting Both EPH (MAC) and PHY in Power Down Mode:
Restoring Back in Normal Operation from Power Down Mode:
Currents Measured Under Normal Operation Modes:
Idle (No cable connected)
1. Disable Transmitter – Clear the TXENA bit of the Transmit Control Register;
2. Remove and release all TX completion packet numbers on the TX completion FIFO;
3. Disable Receiver – Clear the RXEN bit of the Receive Control Register;
4. Remove and Release all Received packets;
5. Clear the Interrupt Status Register;
6. Set PDN bit in PHY MI Register 0 to 1 to set internal PHY entered in power down mode;
7. Write and set “0” to the “EPH Power EN” Bit located in the Configuration Register (MAC Register,
1. Write and set “1” to the “EPH Power EN” Bit of the Configuration Register, Bank 1 Offset 0;
2. Be sure the ANEG bit of RPCR Register is set already;
3. Clearing PDN bit of the PHY register 0 to 0x1000 from 0x1800, this will set the PHY in the isolation
4. Set one more time with 0x1000 to clear the MII_DIS bit to clear the isolation mode. Wait for at least
5. Issue MMU Reset Command;
6. Enable Transmitter of EPH block – Set the TXENA bit of the Transmit Control Register;
7. Enable Receiver of EPH block– Set the RXEN bit of the Receive Control Register.
a. Typical currents measured under Normal Operation Modes:
Bank 1 Offset 0) to set EPH (MAC) in power down mode.
mode (0x1400);
1500 ms for the PHY resuming back to normal operation;
100MB
10MB
APPLICATION NOTE
VOLTAGE
3
(V)
3.3
3.3
3.3
TYPICAL CURRENT (MA)
113
111
82
Revision 1.0 (01-28-09)