LFE2-50E-L-EV Lattice, LFE2-50E-L-EV Datasheet - Page 22

• Manufacturer Part Number: LFE2-50E-L-EV
• Description: MCU, MPU & DSP Development Tools ECP-2 Standard Eval Board
• Manufacturer: Lattice

Specifications of LFE2-50E-L-EV

• Processor To Be Evaluated: LatticeECP2
• Interface Type: RS-232, Ethernet
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Lattice Semiconductor
Table 43. Compact Flash Connector (Continued)
RS-232
The DB9 connector at J2 provides a standard DCE RS-232 connection to the FPGA. There are two jumpers, J1
and J3, which allow use of a straight-wired cable or a null modem cable.
Table 44. RS-232 Connector to FPGA Pins
Table 45. RS-232 Connector to FPGA Pins
Configuring/Programming the Board
Requirements
• PC with Lattice Semiconductor’s ispVM System version 16.0 (or later) programming software, installed with
• Any ispDOWNLOAD or Lattice USB Cable (pDS4102-DL2x, HW7265-DL3x, HW-USB-2x, etc.).
For a complete discussion of the LatticeECP2’s configuration and programming options, refer to Lattice technical
note number TN1108, LatticeECP2 sysCONFIG Usage Guide.
SRAM Configuration
The LatticeECP2 SRAM can be configured easily via the JTAG port. The LatticeECP2 device is SRAM-based, so it
must remain powered to retain its configuration when programming just the SRAM. To program the SRAM, perform
the following procedure:
1. Check that J7 and J8 are properly set (see Table 6 and Table 7), and that J10 and J11 are open.
2. Connect the ispDOWNLOAD cable to the JTAG header at J4. When using a 1x8 connector on the download
appropriate drivers (USB driver for USB Cable, Windows NT/2000/XP parallel port driver for ispDOWNLOAD
Cable). Note: An option to install these drivers is included as part of the ispVM System setup. The ispVM System
software can be download from the Lattice web site at: latticesemi.com/ispvm.
cable, connect to the 1x10 header by justifying the alignment to pin 1 (pin 1 on the cable to pin 1 on the header,
pin 1 is Vcc).
1 to 2
2 to 3
Signal
J1
CD2
D00
D01
D02
A00
WP
1 to 2
2 to 3
J3
J12
20
21
22
23
24
25
1. Wired to TD or RD depending on J1 and J3
Use with a straight-wired cable.
Use with a null modem cable (wires 2 and 3 swapped).
FPGA Pin
C1
D1
C2
D3
E7
D5
D4
B2
F8
J7
FPGA Pin
CTS
RTS
Transmit Data (to the cable)
Receive Data (from the cable)
22
RS-232 Signal
Function
LatticeECP2 Standard Evaluation Board
D6
H7
C4
F7
B1
—
1
1
J12
45
46
47
48
49
50
User’s Guide
Signal
BVD2
BVD1
GND
Default
D08
D09
D10
X