71M6521BE-DB Maxim Integrated Products, 71M6521BE-DB Datasheet - Page 106
71M6521BE-DB
Manufacturer Part Number
71M6521BE-DB
Description
Power Management Modules & Development Tools 71M6521BE DEMO BOARD M6521BE DEMO BOARD
Manufacturer
Maxim Integrated Products
Datasheet
1.71M6521DE-DB.pdf
(138 pages)
Specifications of 71M6521BE-DB
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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All generic SFRs are explained in detail in section 6.3.2.
Revision 1.7
Register
Program status
word
Accumulator
B register
Stack pointer
Data pointer
Secondary data
pointer
Data pointer
select register
Port registers
Serial data buffer
Serial port reload
registers
Timer registers
Interrupt control
registers
Clock control
register
Watchdog timer
reload register
Baud rate
generator selector
Generic Special Function Register Overview
Symbol
PSW
ACC
B
SP
DPL, DPH
DPL1, DPH1
DPS
P0, P1, P2
S0BUF, S1BUF
S0RELL, S0RELH,
S1RELL, S1RELH
TL0, TL1, TH0,
TH1
IP0, IP1, IEN,
IEN0, TMOD,
TCON, T2CON,
SCON, PCON,
IRCON
CKCON
WDTREL
WDCON
© Copyright 2005-2007 TERIDIAN Semiconductor Corporation
Description
The PSW contains program status information
The accumulator register. Mmemonics for instructions involving the accumulator
refer to the accumulator as A.
This register is used for multiply and divide operations. It may also be used as a
scratchpad (temporary) register.
The stack pointer is 8 bits wide and is incremented before data is stored with
PUSH and CALL operations. SP is initialized to 0x07 after reset.
Since the DP consists of two bytes (DPH and DPL), it can hold a 16-bit address.
It may be manipulated as a 16-bit register or as two separate 8-bit registers.
This register is a second 16-bit data pointer.
Note: Check with the documentation on the compiler used for generating MPU
code whether this pointer is utilized or not.
This register selects which data pointer is to be used for the current operation.
These registers hold bit patters that are written to or read from the DIO ports
These registers hold data received from the serial interfaces 0 and 1. Data to be
transmitted via the serial interfaces is written to S0BUF or S1BUF.
These register pairs can be used to control the baud rate for the serial ports 0
and 1.
These register pairs (TH0/TL0 and TH1/TL1) are the 16-bit counting registers for
timers 0, 1, and 2.
These registers contain control and status bits pertaining to the interrupt system,
the timers/counters, and the serial port.
The clock control/configuration register. It is used to implement stretch memory
cycles for memory access.
This register holds the reload count for the software watchdog timer
This register determines whether UART0 is controlled by timer 1 or by the
internal baud rate generator.
TERIDIAN Proprietary
71M652X Software User’s Guide
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