CDK-5581 Cirrus Logic Inc, CDK-5581 Datasheet - Page 30

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CDK-5581

Manufacturer Part Number
CDK-5581
Description
Audio Modules & Development Tools KIT CDB558 w/ Capture Plus II
Manufacturer
Cirrus Logic Inc
Datasheet

Specifications of CDK-5581

Product
Audio Modules
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
3/25/08
CS5581
14:34
SCLK – Serial Clock Input/Output, Pin 23
The SMODE pin determines whether the SCLK signal is an input or an output signal. SCLK
determines the rate at which data is clocked out of the SDO pin. If the converter is in SSC
mode, the SCLK frequency will be determined by the master clock frequency of the converter
(either MCLK or the internal oscillator). In SEC mode, the user determines the SCLK frequency.
If SCLK is an output (SMODE = VL), it will be in a high-impedance state when CS is high.
RDY – Ready, Pin 24
At the end of any conversion RDY falls to indicate that a conversion word has been placed into
the serial port. RDY will return high after all data bits are shifted out of the serial port or two mas-
ter clock cycles before new data becomes available if the CS pin is inactive (high); or two mas-
ter clock cycles before new data becomes available if the user holds CS low but has not started
reading the data from the converter when in SEC mode.
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DS796PP1

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