PI6CX300LE Pericom Semiconductor, PI6CX300LE Datasheet - Page 2
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PI6CX300LE
Manufacturer Part Number
PI6CX300LE
Description
Manufacturer
Pericom Semiconductor
Datasheet
1.PI6CX300LE.pdf
(6 pages)
Specifications of PI6CX300LE
Lead Free Status / RoHS Status
Supplier Unconfirmed
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Company
Part Number
Manufacturer
Quantity
Price
Pin Description
Panel Display Frequencies
Frequency Select Table
Note:
1. Outputs designated with "no use" are held to a logic LOW.
Pin Number
5, 6, 11, 12
4, 10, 15
2, 3, 16
7, 13
8, 9
14
S2
1
0
0
0
0
1
1
1
1
07-0039
CLK1, CLK2
CLK3, CLK4
Pin Name
X1, X2
/PDTS
S0, S1
GND
V
S1
V
0
0
1
1
0
0
1
1
S2
DD
IN
(1)
Pin Description
Crystal inputs
VCXO voltage input.
Ground
3.3V ±5% Positive power supply. Bypass with 0.1μF||0.01μF capacitors and place as close to
each V
PLL clock outputs with weak pull-downs
Power-down. /PDTS is active LOW with weak pull-up. When /PDTS is active, all outputs are
LOW, and all outputs will stop glitch free at their respective
HIGH-to-LOW transition after /PDTS is asserted.
Input frequency select pins with weak pull-ups
S0
0
1
0
1
0
1
0
1
DD
pins as possible. Power pins are not connected internally.
(MHz)
CLK1
no use
no use
54
54
54
54
54
54
3.3V VCXO with Triple PLL Panel Clock Synthesizer
2
(MHz)
CLK2
no use
no use
74.25
74.25
82
66
82
66
(MHz)
CLK3
no use
no use
no use
no use
no use
62
69
55
P-1.6
(MHz)
CLK4
no use
no use
no use
no use
no use
no use
no use
no use
PI6CX300
03/01/07