LDS8845002T2 Leadis Technology, LDS8845002T2 Datasheet - Page 6

LED Drivers 4Ch no Chrg Pump,3x3 comp to RT9362

LDS8845002T2

Manufacturer Part Number
LDS8845002T2
Description
LED Drivers 4Ch no Chrg Pump,3x3 comp to RT9362
Manufacturer
Leadis Technology
Datasheet

Specifications of LDS8845002T2

Number Of Segments
4
Operating Supply Voltage
2.7 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Package / Case
TQFN EP
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
LDS8845
BLOCK DIAGRAM
BASIC OPERATION
The device starts operating if the EN pin is set logic
HIGH and input voltage is higher that under voltage
protection lockout threshold.
The low dropout PowerLite™ Current regulator
performs well at input voltages up to 50 mV greater
than the LED forward voltage significantly increasing
the driver’s efficiency.
Input pins EN, CTRL0, and CTRL1 may be either
logic LOW or HIGH during power-up. However, logic
voltage should never exceed input voltage V
these pins should not be left float.
LED Current Setting
The desired current value in each of the four LED is
set by external resitor R
pin and ground..
The LED current is 400 times greater than the current
through R
equation:
its resistance.
R
table below.
© 2008 Leadis Technology
Characteristics subject to change without notice
I
SET
LED
value for typical I
400
SET
x
V
R
and can be estimated by following
SET
SET
, where V
LED
SET
current is shown at the
connevted between I
SET
=1.2V, and R
Figure 2. LDS8845 Functional Block Diagram
SET
IN
, and
is
SET
6
ILED, mA
5
10
15
20
25
30
The average current value may be decreased using
PWM signal applied to either CTRL0 or CTRL1 pin.
LDS8845 allows modulation frequiencies in the range
from 100 Hz to 10 kHz with duty cycles from 100% to
1%. Modulation frequiencies lower than 100 Hz are
not recommended especialy at short duty cycles
because LED flicker may be visible.
If CTRL1 pin is logic HIGH and PWM signal applies
to CTRL0 pin, then all four LEDS are dimming
synchronously.
If CTRL0 pin is logic HIGH and PWM signal applies
to CTL1 pin, then LEDs from LED1 to LED3 are
dimming, while LED4 is always off.
If PWM signal applies to both CTRL pins teed
together, then LED1 and LED2 are dimming, while
LED3 and LED4 are off.
R
96
48
32
24
19.2
16
SET
, kΩ Nearest standard 1% value
95.3
47.5
31.6 or 32.4
23.7 or 24.3
19.1
15.8 or 16.2
Doc. No. 8845DS, Rev. 1.5

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