MAX16814BEUP+ Maxim Integrated Products, MAX16814BEUP+ Datasheet - Page 9

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MAX16814BEUP+

Manufacturer Part Number
MAX16814BEUP+
Description
LED Drivers Integrated 4-Channel High-Brightness LED
Manufacturer
Maxim Integrated Products
Datasheet

Specifications of MAX16814BEUP+

Lead Free Status / RoHS Status
Lead free / RoHS Compliant
TQFN
12
13
14
15
16
17
18
19
20
PIN
TSSOP
Integrated, 4-Channel, High-Brightness LED
15
16
17
18
19
20
1
2
3
Driver with High-Voltage DC-DC Controller
_______________________________________________________________________________________
LEDGND
NAME
PGND
NDRV
OUT2
OUT3
OUT4
DRV
V
CS
EP
CC
LED String Cathode Connection 2. OUT2 is the open-drain output of the linear current sink that
controls the current through the LED string connected to OUT2. OUT2 sinks up to 150mA. If
unused, connect OUT2 to LEDGND.
LED Ground. LEDGND is the return path connection for the linear current sinks. Connect
SGND, LEDGND, and PGND at a single point.
LED String Cathode Connection 3. OUT3 is the open-drain output of the linear current sink that
controls the current through the LED string connected to OUT3. OUT3 sinks up to 150mA. If
unused, connect OUT3 to LEDGND.
LED String Cathode Connection 4. OUT4 is the open-drain output of the linear current sink that
controls the current through the LED string connected to OUT4. OUT4 sinks up to 150mA. If
unused, connect OUT4 to LEDGND.
Current-Sense Input. CS is the current-sense input for the switching regulator. A sense resistor
connected from the source of the external power MOSFET to PGND sets the switching current
limit. A resistor connected between the source of the power MOSFET and CS sets the slope
compensation ramp rate (see the Slope Compensation section).
Power Ground. PGND is the switching current return path connection. Connect SGND,
LEDGND, and PGND at a single point.
Switching n-MOSFET Gate-Driver Output. Connect NDRV to the gate of the external switching
power MOSFET.
MOSFET Gate-Driver Supply Input. Connect a resistor between V
MOSFET driver with the internal 5V regulator. Bypass DRV to PGND with a minimum of 0.1µF
ceramic capacitor.
5V Regulator Output. Bypass V
as possible to the device.
Exposed Pad. Connect EP to a large-area contiguous copper ground plane for effective power
dissipation. Do not use as the main IC ground connection. EP must be connected to SGND.
CC
to SGND with a minimum of 1µF ceramic capacitor as close
FUNCTION
Pin Description (continued)
CC
and DRV to power the
9

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