MAX1739EEP+ Maxim Integrated Products, MAX1739EEP+ Datasheet - Page 9

• Manufacturer Part Number: MAX1739EEP+
• Description: Display Drivers Wide Brightness Rang e CCFL Backlight Con
• Manufacturer: Maxim Integrated Products

Specifications of MAX1739EEP+

• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

PIN
10
11
12
13
14
15
16
17
18
19
20
1
2
3
4
5
6
7
8
9
MAX1739
CRF/SDA
MINDAC
CTL/SCL
SH/SUS
MODE
CSAV
SYNC
CTFB
BATT
GND
CCV
REF
DL2
DL1
BST
CCI
DH
CS
VL
LX
_______________________________________________________________________________________
_______________________________________________________________________________________
NAME
MAX1839
MINDAC
MODE
SYNC
CSAV
CTFB
BATT
GND
CCV
REF
CRF
CTL
DL2
DL1
BST
CCI
DH
SH
CS
VL
LX
2V Reference Output. Bypass to GND with 0.1μF. Forced low during shutdown.
DAC Zero-Scale Input. V MINDAC sets the DAC’s minimum scale output voltage.
Disable DPWM by connecting MINDAC to VL.
GMI Output. Output of the current loop GMI amplifier that regulates the CCFL current.
Typically bypass to GND with 0.1μ F .
GMV Output. Output of the voltage loop GMV amplifier that regulates the maximum
average primary transformer voltage. Typically bypass to GND with 3300p F .
Logic Low Shutdown Input in Analog Interface Mode. SMBus suspends input in SMBus
interface mode (MAX1739 only).
5- Bi t AD C Reference Input in Anal og Inter face Mod e. Bypass to GN D wi th 0.1μF. SM Bus seri al
d ata i np ut/op en- d r ai n outp ut ( MAX 1739 onl y) i n S M Bus i nter face m od e.
CCFL Brightness Control Input in Analog Interface Mode. SMBus serial clock input
(MAX1739 only) in SMBus interface mode.
Interface Selection Input and Sync Input for DPWM Chopping (see Synchronizing the
DPWM Frequency). The average voltage on the MODE pin selects one of three CCFL
brightness control interfaces:
1) MODE = VL, enables SMBus serial interface (MAX1739 only).
2) MODE = GND, enables the analog interface (positive scale analog interface mode);
3) MODE = REF, enables the analog interface (negative scale analog interface mode);
Current-Sense Input. Input to the GMI error amplifier that drives CCI.
Center-Tap Voltage Feedback Input. The average V CTFB is limited to 0.6V.
Royer Synchronization Input. Falling edges on SYNC force DH on and toggle the DL1
and DL2 drivers. Connect directly to the Royer center tap.
Low-Side N-Channel MOSFET 2 Gate Drive. Drives the Royer oscillator switch. DL1 and
DL2 have make-before-break switching, where at least one is always on. Falling edges
on SYNC toggle DL1 and DL2 and turn DH on.
Low-Side N-Channel MOSFET 1 Gate Drive
Current-Sense Input (Current Limit). The current-mode regulator terminates the switch
cycle when V CS exceeds (V REF - V CCI ).
System Ground
5.3V Linear Regulator Output. Supply voltage for most of the internal circuits. Bypass
with 1μF capacitor to GND. Can be connected to V BATT if V BATT < 5.5V.
High-Side Driver Bootstrap Input. Connect through a diode to VL and bypass with 0.1μF
capacitor to LX.
High-Side Driver Ground Input
High-Side Gate Driver Output. Falling edges on SYNC turn on DH.
Supply Input. Input to the internal 5.3V linear regulator that powers the chip.
V CTL/SCL = 0 means minimum brightness.
V CTL/SCL = 0 means maximum brightness.
CCFL Backlight Controllers
Wide Brightness Range
FUNCTION
Pin Description
9