AME9003AETH AME, AME9003AETH Datasheet - Page 11

• Manufacturer Part Number: AME9003AETH
• Description: CCFL Inverters & Accessories Backlight Controller
• Manufacturer: AME

Specifications of AME9003AETH

• Function: Backlight Controller
• Input Voltage: 3.5 V
• Output Voltage: 5.35 V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

AME9003
n Application Notes
Overview
cathode fluorescent lamp) with a high voltage sine wave
in order to produce an efficient and cost effective light
source. The most common application for this will be as
the backlight of either a notebook computer display, flat
panel display, or personal digital assistant (PDA).
glass rods that can range from several cm to over 30cm
and 2.5mm to 6mm in diameter. Typically they require a
sine wave of 600V and they run at a current of several
milliamperes. However, the starting (or striking) voltage
can be as high as 2000V. At start up the tube looks like
an open circuit, after the plasma has been created the
impedance drops and current starts to flow. The starting
voltage is also known as the striking voltage because
that is the voltage at which an arc ” strikes” through the
plasma. The IV characteristic of these tubes is highly
non-linear.
tion has been developed using some sort of transformer -
LC tank circuit combination driven by several small power
mosfets. The AME9003 application uses one external
PMOS, 2 external NMOS and a high turns ratio trans-
former with a centertapped primary. Lamp dimming is
achieved by turning the lamp on and off at a rate faster
than the human eye can detect, sometimes called ” duty
cycle dimming” . These "on-off" cycles are known as dim-
ming cycles. Alternate dimming schemes are also avail-
able.
Steady State Circuit Operation
Throughout this datasheet like components have been
given the same designations even if they are on a differ-
ent figure. The block diagram shows PMOS Q2 driving
the center tap primary of T1. The gate drive of Q2 is a
pulse width modulated (PWM) signal that controls the
current into the transformer primary and by extension,
controls the current in the CCFL. The gate drive signal of
Q2 drives all the way up to the battery voltage and down
to 7.5 volts below Vbatt so that logic level transistors
may be used without their gates being damaged. An
internal clamp prevents the Q2 gate drive (OUTA) from
driving lower than Vbatt-7.5V.
the outside nodes of the transformer primary to VSS.
These transistors are driven by a 50% duty cycle square
wave at one-half the frequency of the drive signal applied
to the gate of Q2.
The AME9003 application circuit drives a CCFL (cold
The CCFL tubes used in these applications are usually
Traditionally the high voltage required for CCFL opera-
Figure 1 shows a block diagram of the AME9003.
NMOS transistors Q3-1 and Q3-2 alternately connect
AME, Inc.
the CCFL application. Figure 4 and 5 are detailed views
of the power section from Figures 1 and 2. Figure 5 has
the transformer parasitic elements added while Figure 4
does not. Referring to Figures 4 and 5, NMOS transis-
tors Q3-1 and Q3-2 are driven out of phase with a 50%
duty cycle signal as indicated by waveforms in Figure 3.
The frequency of the NMOS drive signals will be the fre-
quency at which the CCFL is driven. PMOS transistor,
Q2, is driven with a pulse width modulated signal (PWM)
at twice the frequency of the NMOS drive signals. In
other words, the PMOS transistor is turned on and off
once for every time each NMOS transistor is on. In this
case, when NMOS transistor Q3-1 and PMOS transistor
Q2 are both on then NMOS transistor Q3-2 is off, the
side of the primary coil connected to NMOS transistor
Q3-1 is driven to ground and the centertap of the trans-
former primary is driven to the battery voltage. The other
side of the primary coil connected to NMOS transistor
Q3-2 (now ” off” ) is driven to twice the battery voltage
(because each winding of the primary has an equal num-
ber of turns).
to Q3-1 (the ” on” transistor), transferring power to the
secondary coil of transformer. The energy transferred from
the primary excites the tank circuit formed by the trans-
former leakage inductance and parasitic capacitances that
exist at the transformer secondary. The parasitic capaci-
tances come from the capacitance of the transformer sec-
ondary itself, wiring capacitances, as well as the parasitic
capacitance of the CCFL. Some applications may actu-
ally add a small amount of parallel capacitance (~10pF)
on the output of the transformer in order to dominate the
parasitic capacitive elements.
transformer centertap returns to ground as does the drain
of NMOS transistor Q3-2 (the drain of Q3-2 was at twice
the battery voltage). Halfway through one cycle, NMOS
transistor Q3-1 (that was on) turns off and NMOS transis-
tor Q3-2 (that was off) turns on. At this point, PMOS
transistor Q2 turns on again, allowing current to ramp up
in the side of the primary that previously had no current.
Energy in the primary winding is transferred to the sec-
ondary winding and stored again in the leakage induc-
tance L
current alternately goes through one primary winding then
the other.
amount of power transferred from the primary winding to
the secondary winding in the transformer. Note that the
CCFL circuit can work with PMOS transistor Q2 on con-
Figure 3 illustrates some ideal gate drive waveforms for
Current ramps up in the side of the primary connected
When the PMOS, Q2, is turned off, the voltage of the
The duty cycle of PMOS transistor Q2 controls the
leak
, but this time with the opposite polarity. The
CCFL Backlight Controller
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