AS3977BQFU austriamicrosystems, AS3977BQFU Datasheet
AS3977BQFU
Specifications of AS3977BQFU
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AS3977BQFU Summary of contents
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... MHz operating frequency range (ISM) Filtered FSK Data rate up to 100 kb/s FSK deviation programmable up to 64kHz Extremely low power consumption www.austriamicrosystems.com/AS3977 Main Characteristics 2.0 – 3.6V power supply Power down current consumption 100 nA (3V, 25ºC) Output power up to +10dBm Occupied bandwidth 6 kHz (4.8 kb/s, FFSK, ARIB) -40 to 85º ...
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... AS3977 Data Sheet - Figure 1. AS3977 Block Diagram XTAL IN ÷4 XTAL OUT CLK Gen Baudrate Gen. ÷T MC CLK Deviation Data sync. DATA I/O CLOCK ENABLE www.austriamicrosystems.com/AS3977 VCCPLL VCC PA Phase Charge Loop detector pump filter VCO ΔΦ ±Q ÷ P ΣΔ ÷N ...
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... MCCS, CLKS and PSC ............................................................................................................................................................. 33 9.7.4 SETPD (Set Power Down)......................................................................................................................................................... 33 9.8 Output Frequency Setting................................................................................................................................................................... 34 9.8.1 Implementation .......................................................................................................................................................................... 35 9.8.2 Optional Frequency Calculation with Overlapping Fractional Bands by Using the Bit INT<8>.................................................. 36 9.8.3 FSK Deviation Setting and Frequency Trimming....................................................................................................................... 37 9.9 Baud Rate Generator ......................................................................................................................................................................... 38 www.austriamicrosystems.com/AS3977 Revision 3 ...
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... AS3977 Data Sheet - 9.10 Reference Design PREOUT and PAOUT Connection ..................................................................................................................... 38 9.10.1 Matching Circuit and PREOUT and PAOUT Connections to the Supply Voltage ................................................................... 38 10 Measurement Results........................................................................................................................................................... 10.0.1 Applicable Radio Standards .................................................................................................................................................... 43 11 Package Drawings and Markings.......................................................................................................................................... 12 Ordering Information............................................................................................................................................................. www.austriamicrosystems.com/AS3977 Revision 3 ...
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... AS3977 Data Sheet - Pin Assignments Figure 2. Pin Assignments (Top View) 4.1 Pin Descriptions Table 1. Pin Descriptions Pin Name Pin Number PREOUT 1 PAOUT 2 RESERVED 3 VCCPLL 4 ENABLE 5 www.austriamicrosystems.com/AS3977 PREOUT MCCLK 1 12 PAOUT DATAIO 2 11 AS3977 GND VDD 3 10 VCCPLL VREGDIG Type PREOUT Open Collector preamplifier output, need a feeding coil ...
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... MCCLK 12 VSS 13 Reserved 14 VCCPA 15 VREGRF 16 GND 17 www.austriamicrosystems.com/AS3977 Type CLK SDI clock VDD VDD XTAL oscillator input, DC Level approximately 1 Volt, needs an DC Blocker in case of external clock VDD XTALOUT XTAL oscillator output, DC Level approximately 1 Volt VDD VREGDIG Voltage regulator2 (VRegDig) output, requires a capacitor with nominal 100 nF ...
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... ESD for Analog Pins ESD AMM ESD RFHBM ESD for RF Pins ESD RFMM Total power dissipation (all supplies and outputs) Storage temperature STRG Package body temperature (T ) BODY Humidity non-condensing www.austriamicrosystems.com/AS3977 Min Max Units -0.5 5.0 V Voltage on all supply Pins VCCPA,VCCPLL - ±4 kV ±200 V ± ...
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... FSK Deviation 2 Phase noise @ 50 kHz Phase noise @ 250 kHz Phase noise @ 1 MHz P Adjacent Channel Power ACP2 OBW Occupied Bandwidth 2 www.austriamicrosystems.com/AS3977 Conditions Voltage on all supply VCCPA,VCCPLL,VDD VCC-VDD, GND-VSS Conditions Depends on Power Setting Internal Manchester Coding programmable (8bit) Resolution of FSK Deviation (see Table 5) 216-960MHz at frequencies > ...
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... Frequency Band Section ΔFSK Resolution of FSK Deviation res2 1. INT<8> refer to Register Settings Table 6. Reference Frequency Generator and Micro Controller Clock Driver Symbol Parameter Crystal Oscillator www.austriamicrosystems.com/AS3977 Conditions 47-74MHz 87.5-118MHz 174-230MHz 470-862MHz (EN 300 220) at other frequencies < 1GHz at ≥ 1GHz (EN 300 220) ARIB ...
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... Table 8. Loop Filter Bandwidth Symbol Parameter Filter Bandwidth at 315 MHz @ 12.5 µ µA Charge pump setting CHP @ 37.5µ µA Filter Bandwidth at 433 MHz www.austriamicrosystems.com/AS3977 Conditions V =2.0…3.6V, SUP T =-40…85ºC AMB crystal series resistance ≤ 100Ω f =13.56MHz, C =12pF XOSC L ...
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... Output Power Variation vs. VDD and P OUT Temperature @ 50Ω Output Power Variation vs. P OUT Temperature @ 50Ω Max Output Power @ 50Ω P OUT 1. Limits by production test measurement uncertainties www.austriamicrosystems.com/AS3977 Conditions Reference Frequency = 4MHz V = 3.0 V; SUP T = 25ºC AMB Reference Frequency = 4MHz V = 3.0 V; SUP T = 25º ...
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... Table 13. Low Supply Voltage Detector (Bit LS) Symbol Parameter Low Supply Detection Threshold V LS Voltage Low Supply Release Threshold V LS Voltage www.austriamicrosystems.com/AS3977 Conditions V =3V, @ 25ºC, SUP Power depending on power setting with or without the use of the internal voltage regulator, external matching network included V =3V, @ 25ºC, ...
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... ITX8dBm 31 315 MHz band @ 50Ω including 5 matching network, strong AB operation Transmit Mode @ 8dBm output power, ITX8dBm 43 433 MHz band @ 50Ω including 3 matching network, strong AB operation www.austriamicrosystems.com/AS3977 Conditions T = -40…85ºC AMB T = -20…65ºC AMB T = -40…85ºC AMB /12 TS ...
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... Low level output voltage OL C Capacitive load L t Rise time R Fall time t F High level output current I OH Low level output current I OL www.austriamicrosystems.com/AS3977 Conditions V =3V @ 25ºC SUP without the use of the internal V =2.0…3.6V, SUP regulator T =-40…85ºC AMB V =3V @ 25ºC SUP ...
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... Be aware that the Power Down Mode can be entered by setting ENABLE low for more than 2 Figure 3. Write Data ENABLE CHD CLK CLK polarity MCCLK DATAI behavior DATAO Figure 4. Read Data ENABLE CLK DATAI DATAI DATAO www.austriamicrosystems.com/AS3977 DIS DIH DATAI DATAI DATAI DIHZ DOS DOH DATAO ( Revision 3 ...
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... MS (MCCLK behavior) Data in hold time t MH (MCCLK behavior) www.austriamicrosystems.com/AS3977 Condition time for the µC to release the DATAIO bus time for the SDI to release the DATAIO bus Setup time of CLK with respect to ENABLE rising edge Hold time of CLK with respect to ENABLE ...
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... The low power reset (LPR) disables the power amplifier, if the supply voltage falls below the low power threshold. 8.7 Low Drop Out Regulators In order to avoid stability issues, external capacitors are required. www.austriamicrosystems.com/AS3977 Temperature = TS < 9…0 > * 0.19 – 50 (see Table 1) Revision 3.6 ...
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... SDI programming or when a new transmission starts. The Baud rate generator offers different types of data outputs: one fully asynchronous, one synchronous and one synchronous but Manchester coded. By means of AS3977 command control Byte, any of the three different output data types can be selected. www.austriamicrosystems.com/AS3977 Revision 3 ...
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... The PLL is switched on and locked at the selected output frequency. The power amplifier is in power down mode. This mode enables OOK- ASK modulation by switching the PA on and off. Transmit Mode The PLL is switched on and locked at the selected output frequency. The power amplifier is in power on mode. This is the FSK mode for transmitting data. www.austriamicrosystems.com/AS3977 Powerdown Timer Powerdown reset Baudrate ...
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... As an additional feature, the AS3977 provides a configurable clock signal derived from the crystal frequency. The purpose of this clock signal is to provide a µC clock and to enable data synchronization. A timer is included to power down (Power Down Mode) the transmitter after a certain time, which is defined as 2 oscillator- Period. www.austriamicrosystems.com/AS3977 Power ON External Hardware ...
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... SDI clock edge and the first readable bit read is transferred from SDI slave to the master. In any case, the SDI master has to reset the SDI interface on the last bit of the data in order to stop the communication by applying an Enable LOW pulse (duration: min > 1 SDI CLK cycle, max: < 1/f www.austriamicrosystems.com/AS3977 Figure 7. ...
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... In case the ENABLE line has been longer than 16 2 clock cycles low, data take over condition is determined here www.austriamicrosystems.com/AS3977 Table 19 and must be carried out every time when the supply voltage is less than the 8). Hardware Reset Method Apply Power to the AS3977 ...
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... MSB to LSB. If more SDI clock cycles are provided, data remains consistent and each data byte belongs to given or incremented address. In the following figures (Figure 10 and Figure initialization base for this timing diagram is a “LOW” on the CLK line during Initialization. www.austriamicrosystems.com/AS3977 ...
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... Figure 11. Reading of Data with Auto-Incrementing Address ENABLE CLK DATAI (µC Driven DATAO (AS3977 Driven DATAIO Data D7-D0 at Address A5-A0 is transferred here www.austriamicrosystems.com/AS3977 DATAIO line driver control changes from microcontroller to AS3977 Data D7-D0 at Address A5-A0 is trans- ferred to the Output Register of AS3977 ...
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... SDI communication or by setting ENABLE low for more than 2 (Power Down Timer). When the Power Down Mode is left (by the rising edge of ENABLE), the crystal oscillator is activated. www.austriamicrosystems.com/AS3977 Tx Configuration and pre-configuration for ...
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... X Transmit 0 X Transmit 0 0 Transmit 0 0 Transmit 0 1 www.austriamicrosystems.com/AS3977 Software Power Down Method Set power Down Bit =1 and put ENABLE to LOW level Power on reset complete with next xtal cycle ENABLE LT ↑ 1 ↑ CLK ↑ 0 DATAIO is sampled at the falling edge of CLK ↑ ...
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... Power Down Mode ↑ All ↓ Active, Transmit Active, Transmit All 0 ↓ Transmit www.austriamicrosystems.com/AS3977 CLK DATAIO X X activates the crystal oscillator (PD is set to low indicates data are sampled at the falling edge of CLK 1 X indicates data are sampled at the rising edge of CLK ...
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... Bit <A1, A0> www.austriamicrosystems.com/AS3977 Register Address or Transmission Configuration Command Write data to register at address <A5…A0> Read data from register at address <A5…A0> Not defined Transmit data. A0…A5 defines the transmit configuration: Function 0 (00): selects frequency setting 1 1 (00): selects frequency setting 2 Frequency ...
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... M reserved ASC<1:0> N reserved O reserved Default settings given are recommendations according to application note (not set at power up). Table 23. Configuration Registers Description Register Name Synthesizer section A<1:0> SEL<1:0> A<2> ARSRST www.austriamicrosystems.com/AS3977 CPSC DIVR <1:0> <2:0> FRAC1<10:0> INT1<9:0> FRAC2<15:0> FRAC4<11:0> INT4<9:0> ATCPH<3:0> PAOP2 RPAOV2 LS < ...
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... E<9:0> INT2<9:0> E<15:10> FRAC3 <15:0> F<9:0> F<15:10> INT3<9:0> G<3:0> G<15:4> FRAC4 <15:0> H<3:0> H<13:4> INT4<9:0> H<15:14> www.austriamicrosystems.com/AS3977 Default Value Automatic range select division ratio setting 0 (00): f /64 REF 1 (01): f /128 11 REF 2 (10): f /256 REF 3 (11): f /512 REF Reference divider division ratio setting must be set to ...
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... K<4> FSK1 K<5> LT K<6> LS RPAOV2 K<8:7> <1:0> PAOP2 K<10:9> <1:0> www.austriamicrosystems.com/AS3977 Default Value Gaussian filter clock setting application dependent FSK deviation setting application dependent Gaussian filter bypass 0: not bypassed 0 1: bypassed 0: Turn off the VDD RF Regulator 1 1: Turn on the VDD RF Regulator ...
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... Temperature Sensor section N<0> TSON N<1> TSNRST N<7:2> - Power Down Control (see Power On Reset on page 22) N<8> SETPD www.austriamicrosystems.com/AS3977 Default Value Preamplifier power level setting 2 0 (00000): power off 0 (00001): minimum power application dependent : 31 (11111): maximum power Modulation type selection 2 0: FSK 0 ...
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... This bit is used to force the circuit Power Down Mode Down Mode, this bit is reset to ZERO to avoid a dead lock condition. The Power Down Mode can be reached by writing a ONE to this bit whenever a fast transition to the Power Down Mode is needed. www.austriamicrosystems.com/AS3977 Default Value reserved Bits: set to Binary 0000000 for normal mode ...
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... In case, the Value of the A-counter is zero, the value of the A-counter has to be increased by M and the value of N has to be decreased by one In case, the N-counter is in the range from and the value of the A-counter is less than N-counter-7: Note: In case, no solution can be found for the wanted center frequency, it may help to modify the reference frequency or INT<8> www.austriamicrosystems.com/AS3977 ⋅ ⋅ ...
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... Taken the default value of INT<8>=0 into account, the value of the INT<7:40> can be calculated by: INT < 7:4 > = AC-1 9.8.1.4 Fractional Part and Values of FRAC<15:0> Taken the default value of INT<8>=0 into account, multiplying the Fractional part with 2 synthesizer value and can be calculated by: 16 FRAC < 15:0 > FRAC www.austriamicrosystems.com/AS3977 ⋅ ⋅ ( ⋅ ...
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... Note that setting INT<8> high increases the PLL in- band noise by approximately 3dB. Therefore it is recommended to use this option only if the required frequency band did not fit to the crystal reference. INT=N-2 FRAC FRAC INT8=1 FRAC INT8=0 FRAC FRAC Steps for INT<8>=1 www.austriamicrosystems.com/AS3977 , 433 -------------------- = = 108 ...
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... FSK Deviation Setting The FSK deviation DF is given by the frequency resolution Δf and the setting of DF<7:0> and can be calculated with the help of: The deviation multiplier DM is determined by the setting of DF<7:6> according to the following table: DF<7:6> 0 (00) 1 (01) 2 (10) 3 (11) www.austriamicrosystems.com/AS3977 f RF ----------------- - ...
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... Matching Circuit and PREOUT and PAOUT Connections to the Supply Voltage Figure 13 shows the Power Line Matching and Transformation Network used on the Reference Design. settings, varying the operation frequency and the Supply Voltage source. Supply blocking capacitors are not shown in the schematic 13). www.austriamicrosystems.com/AS3977 of the Gaussian filter according ...
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... Value Murata-LQW18AN47NG00 Murata-LQW18AN62NG00 Murata-GRM1885C1H100JA01 Murata-GRM1885C1H2R7CZ01 C2 2.7 pF Murata-LQW18AN56NG00 Murata-GRM1885C1HR50CZ01 C1 0.5 pF 433 MHz Murata-LQW18AN24NG00 Murata-LQW18AN33NG00 Murata-GRM1885C1H100JA01 Murata-GRM1885C1H2R2CZ01 C2 2 Murata-LQW18AN43NG00 Murata-GRM1885C1H2R7CZ01 C1 2.7 pF www.austriamicrosystems.com/AS3977 Supply Voltage Π Matching Network to 50Ω 315 MHz Compone Type Value 100 4.7 pF 433 MHz 100 6.8 pF Revision 3.6 Into 50Ω ...
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... Table 25. Part List of the Reference Design Components Supply voltage 2V regulated Source is VREGRF (pin 16) 868/915 MHz L4 8.2 nH Toko-LL1608-FS Toko-LL1608-FS L2 8.2 nH Murata-GRM1885C1H100JA01 Murata-GRM1885C1H1R0CZ01 C2 1.0 pF Murata-LQW18AN10NG00 2.2 pF Murata-GRM1885C1H2R2CZ01 www.austriamicrosystems.com/AS3977 Supply voltage 3V Source is Power Supply 868/915 MHz L4 8.2 nH Toko-LL1608-FS Toko-LL1608-FS L2 8.2 nH Murata-GRM1885C1H100JA01 Murata-GRM1885C1H1R0CZ01 C2 1.0 pF Murata-LQW18AN10NG00 2.2 pF Murata-GRM1885C1H2R2CZ01 Revision 3 ...
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... AS3977 Data Sheet - Measurement Results Figure 14. Output spectrum with 7.5MHz span, Frequency=433.92MHz, P Span=7.5MHz Figure 15. Phase-noise: - 88.5dBc, P =8dBm OUT www.austriamicrosystems.com/AS3977 =8dBm (0.3dBm added due to cable attenuation), OUT Revision 3 ...
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... AS3977 Data Sheet - Figure 16. Modulated signal with bypass gaussian filter, Freq Mod: 5kHz, Deviation: 10kHz Figure 17. Modulated signal with gaussian filter, Freq Mod: 5kHz, Deviation: 10kHz www.austriamicrosystems.com/AS3977 Revision 3 ...
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... Figure 18. Occupied bandwidth with bypass gaussian filter, Occupied bandwidth: 49.7kHz, Freq Mod: 5kHz, Deviation: 10kHz Figure 19. Occupied bandwidth with gaussian filter, Occupied bandwidth: 30kHz, Freq Mod: 5kHz, Deviation: 10kHz 10.0.1 Applicable Radio Standards ARIB STD-T67 (Telemeter, Telecontrol and Data-Transmission Radio Equipment) ETSI EN 300 220 FCC CFR 47 Part 15 www.austriamicrosystems.com/AS3977 Revision 3 ...
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... Top View Side View 0,75 0,95 Land pattern recommendation for JEDEC MO-220 VGGC Exposed paddle Table 26. Package Dimensions Symbol Pitch E Pad X1 Pad Y1 Pad Space C1 Pad space C2 Tab pad X2 Tab pad Y2 Courtyard V1 Courtyard V2 www.austriamicrosystems.com/AS3977 Bottom View 2,30 2, 0,40 0, Exposed paddle Revision 3.6 ...
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... Revision History Revision Date 3.4 Apr 01, 2008 3.5 Dec 15, 2008 3.6 Apr 16, 2010 Note: Typos may not be explicitly mentioned under revision history. www.austriamicrosystems.com/AS3977 Owner Added block diagram Operation Mode Relations (page 20) kfr/tjs Updated Ordering Information (page 46) Updated Ordering Information (page 46) Revision 3.6 ...
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... Buy our products or get free samples online at ICdirect: For further information and requests, please contact us or find your local distributor at http://www.austriamicrosystems.com/distributor www.austriamicrosystems.com/AS3977 Table 27. Description Delivery Form Tray Tape and Reel http://www.austriamicrosystems.com/ICdirect mailto:sales@austriamicrosystems.com Revision 3.6 1 Package QFN16 4x4 QFN16 4x4 ...
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... AG reserves the right to change specifications and prices at any time and without notice. Therefore, prior to designing this product into a system necessary to check with austriamicrosystems AG for current information. This product is intended for use in normal commercial applications. Applications requiring extended temperature range, unusual environmental requirements, or high reliability applications, such as military, medical life-support or life-sustaining equipment are specifically not recommended without additional processing by austriamicrosystems AG for each application ...