CME-8GB60 AXIOM, CME-8GB60 Datasheet - Page 16

Microprocessor Development Tool

CME-8GB60

Manufacturer Part Number
CME-8GB60
Description
Microprocessor Development Tool
Manufacturer
AXIOM
Datasheet

Specifications of CME-8GB60

Silicon Manufacturer
Freescale
Core Architecture
HC08
Features
SPI And IIC Serial Ports, Regulated +3.3V Power Supply, Analog Or PTB I/O Port
Silicon Core Number
MC9S08GB60
Silicon Family Name
68HC08
Rohs Compliant
No
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
M 6 8 E V B 9 0 8 G B 6 0
9S08GB60 PORT CONNECTORS
MCU_PORT
The MCU PORT provides access to the 9S08GB60 I/O ports.
ANALOG PORT (PTB)
The ANALOG port provides access to the Port B I/O or Analog signals.
PTB0/AD0
PTB2/AD2
PTB4/AD4
PTB6/AD6
VREFH
1 2
3 4
5 6
7 8
9 10 VREFL
PTG0/BGND/MS 57 58 PTG1/XTAL
PTD6/TPM2CH3 21 22 PTD7/TPM2CH4
PTD4/TPM2CH1 23 24 PTD5/TPM2CH2
PTD2/TPM1CH2 25 26 PTD3/TPM2CH0
PTD0/TPM1CH0 27 28 PTD1/TPM1CH1
PTC4/CLKOUT 13 14 PTC5
PTB1/AD1
PTB3/AD3
PTB5/AD5
PTB7/AD7
PTG2/EXTAL 55 56 PTG3
PTA6/KBD6
PTA4/KBD4
PTA2/KBD2
PTA0/KBD0
PTC0/TXD2 17 18 PTC1/RXD2
PTE4/MOSI 33 34 PTE5/SPSCK
PTE0/TXD1 37 38 PTE1/RXD1
PTC2/SDA 15 16 PTC3/SCL
PTE2/SS* 35 36 PTE3/MISO
RESET* 59 60 IRQ
PTG6 51 52 PTG7
PTG4 53 54 PTG5
PTC6 11 12 PTC7
PTE6 31 32 PTE7
PTF6 41 42
PTF4 43 44 PTF5
PTF2 45 46 PTF3
PTF0 47 48 PTF1
3.3V
3.3V 19 20 GND
3.3V 29 30 GND
3.3V 39 40 GND
3.3V 49 50 GND
Notes:
1) PTB4-7 provide DIP Switch input if enabled.
2)
1 2
3 4
5 6
7 8
9 10 GND
PTB0 provides RV1 user pot input if enabled.
PTA7/KBD7
PTA5/KBD5
PTA3/KBD3
PTA1/KBD1
PTF7
16
Notes:
1) PTA0-7 also assigned
2) PTA4-7 also provide
3) PTA7 / SW4 is the
4) PTE0 –1 provide SCI1
5) PTC0-1 provide SCI2
6) PTD0 provides
7) PTG1-2 are the Y1
8) PTG0 is the BGND
9) PTG3-G7 and PTE6-7
0 2 / 1 7 / 0 6
to KEYPAD port.
Push Switch Sw1-4
input if enabled.
monitor Force Monitor
input during Reset.
I/O to COM1 if
enabled.
I/O to COM2 or the
422_485 port if
enabled.
BUZZER output if
enabled.
XTAL and EXTAL
signals by default. R46
and R47 isolate the
MCU PORT pins to
prevent crystal
operation interference.
signal if a BDM is
connected.
provide LCD display
interface if enabled.

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