SK-86R01 Fujitsu, SK-86R01 Datasheet - Page 3
![no-image](/images/manufacturer_photos/0/2/267/fujitsu_sml.jpg)
SK-86R01
Manufacturer Part Number
SK-86R01
Description
KIT, STARTER, JADE, MB86R01
Manufacturer
Fujitsu
Type
Evaluation Boardr
Datasheet
1.MB86R01PB-GSE1.pdf
(89 pages)
Specifications of SK-86R01
Kit Contents
A Base Board, A Graphics Subboard, A Video Extension Input Board, A Video Extension Output Board
Mcu Supported Families
MB86R01
Silicon Manufacturer
Fujitsu
Core Architecture
ARM
Core Sub-architecture
ARM926EJ-S
Features
Built-in SRAM, Remap/Boot Control Function
Rohs Compliant
No
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
- Current page: 3 of 89
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FUJITSU MICROELECTRONICS
PROPRIETARY AND CONFIDENTIAL
MB86R01 DATA SHEET
2007/07/12
2007/08/20
2008/02/07
2007/11/09
Date
Ver.
1.0
1.1
1.2
1.3
Newly issued
8.3.1. Recommended Power On/Off Sequence
8.4.3. ADC
8.4.4. I
8.5.9. I
8.5.12. MLB Signal Timing
4. Function list
6. Pin assignment
7.1. Pin Multiplex
7.2.4. USB 2.0 Host/Function related pin
7.2.5. External interrupt controller related pin
7.2.12. A/D converter related pin
7.2.24. Unused pin
7.2.25. Unused pin with pin multiplex function in the duplex case
8.4.2. DDR2SDRAM IF I/O (SSTL_18)
8.5.1. Memory Controller Signal Timing
8.5.6.2. Input Signal
6. Pin assignment
7.2.2. IDE66 related pin
7.2.3. SD memory controller related pin
7.2.7. CAN related pin
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2
2
C Bus Fast Mode I/O
C Bus Timing
Revised the last line of description (PLL reference clock part)
Revised value of table 8-16
Revised and deleted descriptive content of note
Revised footnote (*2) of table 8-17
Revised table 8-18 and footnote
Deleted footnote (*3)
Revised footnote (*2) of table 8-37
Revised MLB to MediaLB
Revised footnote of table 8-42, 8-45
Revised contents of the list
Revised figures in 1-8/1-9 pages
Added "top view" statement
Revised description of note
Added mode setting description to pin multiplex group #1 ~ #5
Revised table of pin multiplex group #2 and #4
Revised description of USB_EXT12K pin
Revised title
Revised pin name: AD_AVD0 → AD_AVD, AD_AVS1 → AD_AVS
Added this section
Added this section
Revised table 8-12
Revised table 8-21
Revised figure 8-8 and 8-9
Added figure 8-10, 8-11, and 8-12
Revised figure 8-23
Revised figure and table
Revised type
Revised status pin after reset
Unified SD_DAT[0] and SD_DAT[3:1]
Revised type
Revision History
ii
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