DK86065-2 Fujitsu, DK86065-2 Datasheet - Page 2

• Manufacturer Part Number: DK86065-2
• Description: KIT, DEV, SINGLE 14BIT DAC, MB86065
• Manufacturer: Fujitsu

Specifications of DK86065-2

• Kit Contents: MB86065 Evaluation Board, PC USB Programming Cable, PC Control Software Supplied On CD, User Manual
• Mcu Supported Families: MB86065
• Kit Features: Provides Easy Access To On-chip
• Features: Provides Easy Access To On-chip Waveform Memories To Perform Initial Performance Tests
• Application Sub Type: DAC
• Kit Application Type: Data Acquisition
• Rohs Compliant: No
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

Essential Equipment
Apart from the power supplies, the minimum
equipment vital to conducting an evaluation of
the MB86065 is a high quality RF clock and
spectrum analyser. The phase & spurious
performance of the clock should be such as to
not limit the DAC performance (e.g. HP8664A).
However, performance of even the best
spectrum analysers available is inferior to that of
the converter. To overcome this, filtering
techniques and careful attention to analyser
settings, e.g. RF Attenuation, is essential during
the course of the evaluation.
Driving the DAC
As with any DAC evaluation an appropriate test
vector stimulus is required. Unfortunately at data
rates above 300MSa/s this requires digital
pattern generation capabilities beyond most
standard test equipment. The DK86065-2
Development Kit has been designed to help
overcome this difficulty in a number of ways.
Initially, unmodulated or pseudo-modulated
single and multi-tone/carrier tests can be
conducted using waveforms downloaded to the
on-chip memories.
Test waveforms are easily loaded into the
memories using the PC software and USB
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Disclaimer: The contents of this document are subject to change without notice. Customers are advised to consult with FUJITSU sales representatives before
ordering.The information and circuit diagrams in this document are presented “as is”, no license is granted by implication or otherwise.
Production
DK86065-2 14-bit 1+GSa/s DAC Development Kit
programming cable supplied. Even if high speed
digital pattern generating equipment is available,
initial testing using the waveform memories
serves as a useful setup check.
Pattern
can be connected to
the evaluation board
using either the on-
board 2-row 0.1" data
headers, or via ribbon
cables to the optional
SMA adaptors. When
using the 0.1" data
headers it is assumed
that a custom wiring
harness
required. This would
be made according to
the
and
generator’s
The
adaptors provide a convenient conversion from
SMA to the evaluation board’s 0.1" headers. This
alleviates the simultaneous removal of 28 SMAs
(14-bit differential LVDS) when required to be
disconnected. One advantage of this is the ability
to easily swap the data generator between DAC
data ports if insufficient channels are available to
drive both ports simultaneously.
Rather
equipment, customers may wish to use the
evaluation board to construct a platform more
representative of their end application. This
might, for example, involve an FPGA to
implement a variety of pre-processing and/or
waveform generation functions. At the simplest
level, a setup similar to that described for the
digital pattern generator could be used, where a
custom wiring harness interfaces a standard or
existing FPGA platform to the DAC evaluation
board. Control of the DAC from the PC software
can be maintained to minimise effort to get up
and running.
Copyright © 2004-2008 Fujitsu Microelectronics Europe GmbH
connector
pinout
optional
than
generators
will
of
output.
using
SMA
type
the
be
January 2008 Version 2.1
general
FME/MS/DAC80S/FL_2/5488
purpose
test