HFBR-0535 Avago Technologies US Inc., HFBR-0535 Datasheet - Page 11

• Manufacturer Part Number: HFBR-0535
• Description: Fiber Optics, Evaluation Kit
• Manufacturer: Avago Technologies US Inc.

Specifications of HFBR-0535

• Silicon Core Number: HFBR-53D5
• Kit Contents: Evaluation Board, Associated Literature
• Features: Fiber-Optic VCSEL Transceiver, Single Mode Evaluation
• Main Purpose: Interface, Fiber Optics
• Embedded: No
• Utilized Ic / Part: 1x9 Fiber Optic Transceiver Modules
• Primary Attributes: Tests 1x9 Fiber Optic Modules
• Secondary Attributes: SMA Connectors
• Tool / Board Applications: Fiber Optic Transceivers
• Rohs Compliant: Yes
• Operating Voltage: 5 V
• Description/function: Fiber Optic Kit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With/related Products: HFBR-53D5, HFCT-53D5
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Contains lead / RoHS non-compliant

Table 1. Pinout Table
Figure 1. Transmitter Optical Eye Diagram Mask.
11
Pin
1
2
3
4
5
6
7
8
9
Mounting Pins The mounting pins are provided for transceiver mechanical attachment to the circuit board. They are
-0.2
1.3
1.0
0.8
0.5
0.2
0
0
Symbol
RD+
RD-
SD
V
V
V
TD-
TD+
V
0.22
EER
CCR
CCT
EET
NORMALIZED TIME
0.375
Functional Description
embedded in the nonconductive plastic housing and are not connected to the transceiver internal
circuit, nor is there a guaranteed connection to the metallized housing in the EM and FM versions.
Receiver Signal Ground
Directly connect this pin to receiver signal ground plane. (For HFBR-53D5, V
Receiver Data Out
RD+ is an open-emitter output circuit. Terminate this high-speed differential PECL output with
Receiver Data Out Bar
RD- is an open-emitter output circuit. Terminate this high-speed differential PECL output with
Signal Detect
Normal optical input levels to the receiver result in a logic "1" output, V
optical levels to the receiver result in a fault condition indicated by a logic "0" output V
deasserted.
Signal Detect is a single-ended PECL output. SD can be terminated with standard PECL techniques
electrical power with small compromise to signal quality. If Signal Detect output is not used, leave it
open-circuited.
Detect input pr Loss of Signal-bar.
Receiver Power Supply
Provide +5 Vdc via the recommended receiver power supply filter circuit.
Locate the power supply filter circuit as close as possible to the V
Provide +5 Vdc via the recommended transmitter power supply filter circuit.
Locate the power supply filter circuit as close as possible to the V
input pin.
input pin.
Directly connect this pin to the transmitter signal ground plane.
They should be soldered into plated-through holes on the printed circuit board.
standard PECL techniques at the follow-on device input pin.
standard PECL techniques at the follow-on device input pin.
via 50 Ω to V
This Signal Detect output can be used to drive a PECL input on an upstream circuit, such as, Signal
Transmitter Power Supply
Transmitter Data In-Bar
Terminate this high-speed differential PECL input with standard PECL techniques at the transmitter
Transmitter Data In
Terminate this high-speed differential PECL input with standard PECL techniques at the transmitter
Transmitter Signal Ground
0.625
0.78
CCR
1.0
- 2V. Alternatively, SD can be loaded with a 270Ω resistor to V
NIC = NO INTERNAL CONNECTION (MOUNTING PINS)
Figure 2. Pin-Out.
1 = V
2 = RD+
3 = RD-
4 = SD
5 = V
6 = V
7 = TD-
8 = TD+
9 = V
EER
CCR
CCT
EET
TOP VIEW
CCR
CCT
pin.
pin.
NIC
NIC
OH
, asserted. Low input
EER =
EER
V
RX
TX
EET
to conserve
OH
,