AD9639-210KITZ Analog Devices Inc, AD9639-210KITZ Datasheet - Page 31

• Manufacturer Part Number: AD9639-210KITZ
• Description: A/D Converter Evaluation Board
• Manufacturer: Analog Devices Inc

Specifications of AD9639-210KITZ

• Silicon Manufacturer: Analog Devices
• Application Sub Type: ADC
• Kit Application Type: Data Converter
• Silicon Core Number: AD9639
• Kit Contents: Board
• Number Of Adc's: 4
• Number Of Bits: 12
• Sampling Rate (per Second): 210M
• Data Interface: SPI™
• Inputs Per Adc: 1 Differential
• Input Range: 1.5 Vpp
• Power (typ) @ Conditions: 1.3W @ 210MSPS
• Voltage Supply Source: Analog and Digital
• Operating Temperature: -40°C ~ 85°C
• Utilized Ic / Part: AD9639
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

MEMORY MAP
READING THE MEMORY MAP TABLE
Each row in the memory map register table (Table 15) has eight
bit locations. The memory map is divided into three sections: the
chip configuration registers (Address 0x00 to Address 0x02),
the device index and transfer registers (Address 0x05 and
Address 0xFF), and the ADC function registers (Address 0x08
to Address 0x53).
The leftmost column of the memory map indicates the register
address; the default value is shown in the second rightmost
column. The Bit 7 column is the start of the default hexadecimal
value given. For example, Address 0x09, the clock register, has a
default value of 0x01, meaning that Bit 7 = 0, Bit 6 = 0, Bit 5 = 0,
Bit 4 = 0, Bit 3 = 0, Bit 2 = 0, Bit 1 = 0, and Bit 0 = 1, or 0000 0001
in binary. This setting is the default for the duty cycle stabilizer
in the on condition. By writing a 0 to Bit 0 of this address, fol-
lowed by 0x01 in the device update register (Address 0xFF[0],
the transfer bit), the duty cycle stabilizer is turned off. It is
important to follow each write sequence with a transfer bit to
update the SPI registers. For more information about this and
other functions, consult the AN-877 Application Note,
Interfacing to High Speed ADCs via SPI.
Rev. A | Page 31 of 36
RESERVED LOCATIONS
Undefined memory locations should not be written to except
when writing the default values suggested in this data sheet.
Blank cells in Table 15 should be considered reserved bits and
have a 0 written into their registers during power-up.
DEFAULT VALUES
When the AD9639 comes out of a reset, critical registers are
preloaded with default values. These values are indicated in
Table 15.
LOGIC LEVELS
In Table 15, “bit is set” is synonymous with “bit is set to Logic 1”
or “writing Logic 1 for the bit. ” Similarly, “bit is cleared” is synon-
ymous with “bit is set to Logic 0” or “writing Logic 0 for the bit. ”
AD9639