ADNK-3003-TN24 Avago Technologies US Inc., ADNK-3003-TN24 Datasheet - Page 25

• Manufacturer Part Number: ADNK-3003-TN24
• Description: ADNS-3000 Reference Design Kit
• Manufacturer: Avago Technologies US Inc.
• Series: -r

Specifications of ADNK-3003-TN24

• Main Purpose: Reference Design, Optical Mouse
• Embedded: No
• Utilized Ic / Part: ADNS-3000
• Primary Attributes: 2.4GHz RF Link
• Secondary Attributes: USB 2.0
• Lead Free Status / Rohs Status: Details

REST1_DOWNSHIFT
Rest1 to Rest2 Downshift Time Register
Access: Read/Write
Data Type: Eight bit number.
USAGE: This register sets the Rest1 to Rest2 mode downshift time. Time = (register value R1D [7:0]) x (Rest1 period) x 16.
NOTE:
REST2_PERIOD
Rest2 Period Register
Access: Read/Write
Data Type: Eight bit number.
USAGE: This register sets the Rest2 period. Period = (register value R2P [7:0] +1) x 10 ms (typical slow clock period).
NOTE:
25
Min value for this register is 0x01.
Writing into this register when the sensor itself is operating in this rest mode may result in unexpected behavior
of the sensor. To avoid this from happening, below commands should be incorporated prior and after the write
command into this register.
w 22 40 -> write 0x40H into register 0x22H prior to writing into this register
w 10 XX -> writing into this register
w 22 00 -> write 0x00H into register 0x22H after writing into this register
Min value for this register is 0x01. Max value is 0xFD.
Writing into this register when the sensor itself is operating in this rest mode may result in unexpected behavior
of the sensor. To avoid this from happening, below commands should be incorporated prior and after the write
command into this register.
w 22 40 -> write 0x40H into register 0x22H prior to writing into this register
w 11 XX -> writing into this register
w 22 00 -> write 0x00H into register 0x22H after writing into this register
Field R1D7
Field R2P7
Bit 7
Bit 7
Address: 0x10
Reset Value: 0x1f
Address: 0x11
Reset Value: 0x09
6
R1D6
6
R2P6
5
R1D5
5
R2P5
4
R1D4
4
R2P4
3
R1D3
3
R2P3
2
R1D2
2
R2P2
1
R1D1
1
R2P1
0
R1D0
0
R2P0