HCPL-050L-500E Avago Technologies US Inc., HCPL-050L-500E Datasheet - Page 10
![OPTOCOUPLER, TRANSISTOR, 3750VRMS](/photos/31/35/313537/516-8-soic_sml.jpg)
HCPL-050L-500E
Manufacturer Part Number
HCPL-050L-500E
Description
OPTOCOUPLER, TRANSISTOR, 3750VRMS
Manufacturer
Avago Technologies US Inc.
Datasheet
1.HCPL-250L-320E.pdf
(12 pages)
Specifications of HCPL-050L-500E
No. Of Channels
1
Optocoupler Output Type
Phototransistor
Input Current
20mA
Output Voltage
7V
Opto Case Style
SOIC
No. Of Pins
8
Ctr Max
50%
Isolation Voltage
3.75kV
Voltage - Isolation
3750Vrms
Number Of Channels
1, Unidirectional
Current - Output / Channel
8mA
Data Rate
1Mbps
Propagation Delay High - Low @ If
350ns @ 16mA
Current - Dc Forward (if)
25mA
Input Type
DC
Output Type
Open Collector
Mounting Type
Surface Mount
Package / Case
8-SOIC (0.154", 3.90mm Width)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
HCPL-050L-500E
Manufacturer:
AVAGO
Quantity:
40 000
Package Characteristics
Over Recommended Temperature (T
Parameter
Input-Output
Momentary
Withstand
Voltage**
Input-Output
Resistance
Input-Output
Capacitance
*All typicals at T
**The Input-Output Momentary Withstand Voltage is a dielectric voltage rating that should not be interpreted as an input-output continuous
voltage rating. For the continuous voltage rating refer to the IEC/EN/DIN EN 60747-5-2 Insulation Related Characteristics Table (if applicable),
your equipment level safety specification or Avago Application Note 1074 entitled "Optocoupler Input-Output Endurance Voltage," publica-
tion number 5963-2203E.
Notes:
10. The frequency at which the AC output voltage is 3 dB below its mid-frequency value.
11. The JEDEC registration for the 6N136 specifies a minimum CTR of 15%. Avago guarantees a minimum CTR of 15%.
12. See Option 020 data sheet for more information.
13. Use of a 0.1 µf bypass capacitor connected between pins 5 and 8 is recommended.
14. In accordance with UL 1577, each optocoupler is proof tested by applying an insulation test voltage ≥ 4500 V rms for 1 second (leakage
15. In accordance with UL 1577, each optocoupler is proof tested by applying an insulation test voltage ≥ 6000 V rms for 1 second (leakage
16. This rating is equally validated by an equivalent AC proof test.
10
1. Derate linearly above 70˚C free-air temperature at a rate of 0.8 mA/˚C (8-Pin DIP).
2. Derate linearly above 70˚C free-air temperature at a rate of 1.6 mA/˚C (8-Pin DIP).
3. Derate linearly above 70˚C free-air temperature at a rate of 0.9 mW/˚C (8-Pin DIP).
4. Derate linearly above 70˚C free-air temperature at a rate of 2.0 mW/˚C (8-Pin DIP).
5. CURRENT TRANSFER RATIO in percent is defined as the ratio of output collector current, I
6. Device considered a two-terminal device: Pins 1, 2, 3, and 4 shorted together and Pins 5, 6, 7, and 8 shorted together.
7. Common mode transient immunity in a Logic High level is the maximum tolerable (positive) dV
8. The 1.9 kΩ load represents 1 TTL unit load of 1.6 mA and the 5.6 mA kΩ pull-up resistor.
9. The 4.1 kΩ load represents 1 LSTTL unit load of 0.36 mA and 6.1 kΩ pull-up resistor.
Derate linearly above 85˚C free-air temperature at a rate of 0.5 mA/˚C (SO-8).
Derate linearly above 85˚C free-air temperature at a rate of 1.0 mA/˚C (SO-8).
Derate linearly above 85˚C free-air temperature at a rate of 1.1 mW/˚C (SO-8).
Derate linearly above 85˚C free-air temperature at a rate of 2.3 mW/˚C (SO-8).
mon mode pulse signal, V
munity in a Logic Low level is the maximum tolerable (negative) dV
assure that the output will remain in a Logic Low state (i.e., V
detection current limit, I
tion Related Characteristics Table, if applicable.
detection current limit, I
tion Related Characteristics Table, if applicable.
A
= 25˚C.
Sym.
V
I
R
C
I-O
I-O
ISO
I-O
I-O
I-O
CM
Device
8-Pin DIP
SO-8
8-Pin DIP
8-Pin DIP
SO-8
8-Pin DIP
SO-8
≤ 5 µA). This test is performed before the 100% Production test shown in the IEC/EN/DIN EN 60747-5-2 Insula-
≤ 5 µA). This test is performed before the 100% Production test shown in the IEC/EN/DIN EN 60747-5-2 Insula-
, to assure that the output will remain in a Logic High state (i.e., V
A
= 0˚C to 70˚C) unless otherwise specified.
Min.
3750
O
Typ.*
10
0.6
< 0.8 V).
12
CM
Max.
1
/dt on the trailing edge of the common mode pulse signal, V
Units
V rms
µA
Ω
pF
O
, to the forward LED input current, I
Test Conditions
RH < 50%,
t = 1 min.,
T
45% RH, t = 5 s,
V
T
V
f = 1 MHz
A
A
I-O
I-O
O
= 25˚C
= 25˚C
> 2.0 V). Common mode transient im-
CM
= 3 kVdc,
= 500 Vdc
/dt on the leading edge of the com-
Fig.
F
, times 100.
CM
Note
6, 14
6, 16
6
6
, to