HCPL-0601 Fairchild Semiconductor, HCPL-0601 Datasheet - Page 4
![OPTOCOUPLER, LOGIC GATE, 2500VRMS](/photos/22/85/228544/4070917_sml.jpg)
HCPL-0601
Manufacturer Part Number
HCPL-0601
Description
OPTOCOUPLER, LOGIC GATE, 2500VRMS
Manufacturer
Fairchild Semiconductor
Datasheet
1.HCPL-0601.pdf
(13 pages)
Specifications of HCPL-0601
No. Of Channels
1
Optocoupler Output Type
Logic Gate
Input Current
15mA
Output Voltage
7V
Opto Case Style
SOIC
No. Of Pins
8
Mounting Type
Through Hole
Isolation Voltage
2.5kV
Input Current Max
15mA
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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Company
Part Number
Manufacturer
Quantity
Price
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Manufacturer:
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Quantity:
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© 2004 Fairchild Semiconductor Corporation
** All typical values are at V
1. The V
2. Enable Input - No pull up resistor required as the device has an internal pull up resistor.
3. t
4. t
5. t
6. t
7. t
8. t
9. CM
10. CM
11. Device considered a two-terminal device: Pins 1,2,3 and 4 shorted together, and Pins 5,6,7 and 8 shorted together.
TRANSFER CHARACTERISTICS
DC Characteristics
High Level Output Current
Low Level Output Voltage
Input Threshold Current
ISOLATION CHARACTERISTICS
Characteristics
Input-Output
Insulation Leakage Current
Withstand Insulation Test Voltage
Resistance (Input to Output)
Capacitance (Input to Output)
NOTES
tantalum capacitor with good high frequency characteristic and should be connected as close as possible to the package V
and GND pins of each device.
1.5V level on the LOW to HIGH transition of the output voltage pulse.
1.5V level on the HIGH to LOW transition of the output voltage pulse.
to the 1.5V level on the LOW to HIGH transition of the output voltage pulse.
to the 1.5V level on the HIGH to LOW transition of the output voltage pulse.
V
(i.e., V
PLH
PHL
r
f
ELH
EHL
OUT
- Fall time is measured from the 10% to the 90% levels on the HIGH to LOW transition of the output pulse.
- Rise time is measured from the 90% to the 10% levels on the LOW to HIGH transition of the output pulse.
H
L
- Enable input propagation delay is measured from the 1.5V level on the HIGH to LOW transition of the input voltage pulse
- Enable input propagation delay is measured from the 1.5V level on the LOW to HIGH transition of the input voltage pulse
- Propagation delay is measured from the 3.75 mA level on the HIGH to LOW transition of the input current pulse to the
- Propagation delay is measured from the 3.75 mA level on the LOW to HIGH transition of the input current pulse to the
- The maximum tolerable rate of fall of the common mode voltage to ensure the output will remain in the low output state
- The maximum tolerable rate of rise of the common mode voltage to ensure the output will remain in the high state (i.e.,
CC
> 2.0 V). Measured in volts per microsecond (V/µs).
OUT
supply to each optoisolator must be bypassed by a 0.1µF capacitor or larger. This can be either a ceramic or solid
< 0.8 V). Measured in volts per microsecond (V/µs).
CC
HCPL-0600
= 5 V, T
(V
(I
F
E
A
= 250 µA, V
= 2.0 V, I
= 25°C
(V
(V
V
(V
E
CC
(Relative humidity = 45%)
CC
CC
(T
OL
(T
= 2.0 V, I
(V
= 5.5 V, V
(R
A
A
= 5.5 V, V
E
= 5.5 V, I
I-O
= 13 mA) (Note 2)
(Note 11) ( t = 1 min.)
(f = 1 MHz) (Note 11)
= -40°C to +85°C Unless otherwise specified.)
Test Conditions
H
= -40°C to +85°C Unless otherwise specified.)
= 2.0 V) (Note 2)
(T
= 500 V) (Note 11)
(V
< 50%, T
A
Test Conditions
I-O
OL
= 25°C, t = 5 s)
Page 4 of 13
O
F
= 3000 VDC)
O
= 13 mA)
= 5 mA)
= 5.5 V)
= 0.6 V,
LOGIC GATE OPTOCOUPLERS
A
(Note 11)
= 25°C)
Symbol
HCPL-0601
V
I
I
OH
Symbol
FT
OL
V
R
C
I
I-O
ISO
I-O
I-O
HIGH SPEED-10 MBit/s
Min
2500
Min
Typ**
.35
Typ**
10
3
0.6
12
Max
100
0.6
Max
1.0*
5
V
Unit
Unit
mA
µA
µA
RMS
pF
1/7/04
V
CC