HDSP-2107 Avago Technologies US Inc., HDSP-2107 Datasheet - Page 9

DISPLAY DOT MATRIX 42.59X19.58MM 5X7 RED

HDSP-2107

Manufacturer Part Number
HDSP-2107
Description
DISPLAY DOT MATRIX 42.59X19.58MM 5X7 RED
Manufacturer
Avago Technologies US Inc.
Series
HDSP-210xr
Datasheet

Specifications of HDSP-2107

Character Format
Dot Matrix
Character Size
5.08mm
Led Color
Red
Luminous Intensity
15mcd
No. Of Digits / Alpha
8
Display Area Width
42.59mm
Display Area Height
19.58mm
Package / Case
28-DIP
Color
Red
Size / Dimension
1.68" x 0.77" (42.59mm x 19.58mm)
Display Type
Alphanumeric
Number Of Digits/alpha
8
Digit/alpha Size
0.20" (5mm)
Number Of Digits
8
Illumination Color
Red
Wavelength
645 nm
Operating Voltage
4.5 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 45 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Common Pin
-
Lead Free Status / Rohs Status
 Details
Electrical Description
Pin Function
RESET (RST, pin 1)
FLASH (FL, pin 2)
ADDRESS INPUTS
(A
CLOCK SELECT
(CLS, pin 11)
CLOCK INPUT/OUTPUT
(CLK, pin 12)
WRITE (WR, pin 13)
CHIP ENABLE (CE, pin 17)
READ (RD, pin 18)
DATA Bus (D
pins 19, 20, 23-28)
GND (SUPPLY) (pin 15)
GND (LOGIC) (pin 16)
V
9
DD
0
-A
(POWER) (pin 14)
4
, pins 3-6, 10)
0
-D
7
,
Description
Initializes the display.
FL low indicates an access to the Flash RAM and is unaffected by the
state of address lines A
Each location in memory has a distinct address. Address inputs (A
select a specific location in the Character RAM, the Flash RAM or a
particular row in the UDC (User-Defined Character) RAM. A
to select which section of memory is accessed. Table 1 shows the
logic levels needed to access each section of memory.
Table 1. Logic Levels to Access Memory
Section of Memory
Flash RAM
UDC Address Register
UDC RAM
Control Word Register
Character RAM
Used to select either an internal (CLS = 1) or external (CLS = 0) clock source.
Outputs the master clock (CLS = 1) or inputs a clock (CLS = 0) for slave displays.
Data is written into the display when the WR input is low and the CE input is low.
Must be at a logic low to read or write data to the display and must go high between
each read and write cycle.
Data is read from the display when the RD input is low and the CE input is low.
Used to read from or write to the display.
Analog ground for the LED drivers.
Digital ground for internal logic.
Positive power supply input.
3
FL
0
1
1
1
1
-A
4
.
A
X
0
0
1
1
4
A
X
0
1
0
1
3
A
Char. Address
Don’t Care
Row Address
Don’t Care
Character Address
2
A
1
A
0
3
-A
4
are used
0
-A
2
)

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