HDLO-2416-DE000 Avago Technologies US Inc., HDLO-2416-DE000 Datasheet
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HDLO-2416-DE000
Specifications of HDLO-2416-DE000
Related parts for HDLO-2416-DE000
HDLO-2416-DE000 Summary of contents
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... Devices: AlGaAs Red High Efficiency Red HDLS-2416 HDLO-2416 HDLU-2416 HDLO-2416-DE000 ESD WARNING: Standard CMOS handling precautions should be observed with the HDLX-2416. Features x Enhanced drop-in replacement to HPDL-2416 x Smart alphanumeric display Built-in RAM, ASCII decoder, and LED drive circuitry x CMOS IC for low power consumption ...
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The address and data inputs can be directly connected to the microprocessor address and data buses. The HDLX-2416 has several enhancements over the HPDL- 2416. These features include an expanded character set, internal 8 level dimming control, external dimming capa- ...
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Character Set ASCII CODE HEX ...
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... HDLU-2416 HDLS-2416 I Cursor all dots 50% HDLU-2416 Notes 5 Average I measured at full brightness. Peak (#) max. = 135 mA for HDLO/HDLA/HDLY/HDLG-2416, 146 mA for HDLS-2416, and 42 mA for HDLU-2416 at default brightness, 150° junction temperature and Min. Typ. Max. 4.5 5.0 5.5 [1] 25°C Min. Typ. ...
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... DD HDLS/HDLU-2416 Part Number Parameter HDLS-2416 Average Luminous Intensity per Digit, Character Average HDLU-2416 All Peak Wavelength Dominant Wavelength HDLO-2416 Parameter Average Luminous Intensity per Digit, Character Average Peak Wavelength [2] Dominant Wavelength HDLA-2416 Parameter Average Luminous Intensity per Digit, Character Average Peak Wavelength ...
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AC Timing Characteristics over Operating Temperature Range at V Parameter Symbol Address Setup t AS Address Hold t AH Data Setup t DS Data Hold t DH Chip Enable Setup t CES Chip Enable Hold t CEH Write Time t ...
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Electrical Description Pin Function Chip Enable (CE and CE and pins 1 and 2) 2 Clear (CLR, pin 3) When CLR is a logic 0 the ASCII RAM is reset to 20hex (space) and the ...
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CHARACTER RAM 2 WRITE A – ADDRESS 7 DATA IN D – WRITE READ ADDRESS CLR CLR ATTRIBUTE RAM D DIGIT CURSOR 0 DIGIT ...
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Display Clear Data stored in the Character RAM, Control Register, and Attribute RAM will be cleared if the clear (CLR) is held low for a minimum of 10 μs. Note that the display will be cleared regardless of the state ...
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Figure 3 shows how the Extended Function Disable (bit D of the Control Register), Master Blank (bit D 6 the Control Register), Digit Blank Disable (bit D Attribute RAM), and BL input can be used to blank the display. When ...
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(PIN 18) 10 kHz 1 k OUTPUT 1N914 555 6 250 LOG 400 pF Figure 4. Intensity modulation control using an astable multivibrator (reprinted with permission from ...
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Intensity Bin Limits for HDLS-2416 Intensity Range (mcd) Bin Min. Max. E 3.97 6.79 F 5.55 9.50 G 7.78 13.30 H 10.88 18.62 I 15.24 26.07 J 21.33 36.49 Note: Test conditions as specified in Optical Charac- teristic table. For ...