6D326 4D SYSTEMS, 6D326 Datasheet - Page 6
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6D326
Manufacturer Part Number
6D326
Description
DISPLAY, TOUCH, W/CNTRL, ULCD32PTSGC
Manufacturer
4D SYSTEMS
Datasheet
1.6D326.pdf
(23 pages)
Specifications of 6D326
Viewing Area (h X W)
48.6mm X 64.8mm
Supply Voltage
5V
Illumination Colour
Red / Green / Blue
Display Mode
QVGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
J2 Pin Outs (Expansion Port):
J1 Pin Outs (Expansion Port):
I: Input, O: Output, A: Analogue, P: Power
© 2010 4D Systems
µLCD-32PT(SGC)
15, 17
16, 18
Pin
Pin
19
NC
NC
14
15
17
18
21
23
25
27
11
13
21
23
27
28
29
30
1
2
3
5
6
P13/BUS5 I/O
P12/BUS4 I/O
P11/BUS3 I/O
P10/BUS2 I/O
P15/BUS7 I/O
P14/BUS6 I/O
Symbol I/O Description
Symbol I/O Description
P9/BUS1 I/O
P8/BUS0 I/O
RESET
GND
GND
3.3V
3.3V
VCC
NC
NC
P2
P3
RX
P1
P0
P5
P7
P4
P6
TX
I/O PICASO-SGC chip General Purpose I/O Port, bit 2. This pin is 5.0V tolerant.
I/O PICASO-SGC chip General Purpose I/O Port, bit 3. This pin is 5.0V tolerant.
I/O PICASO-SGC chip General Purpose I/O Port, bit 1. This pin is 5.0V tolerant.
I/O PICASO-SGC chip General Purpose I/O Port, bit01. This pin is 5.0V tolerant.
I/O PICASO-SGC chip General Purpose I/O Port, bit5. This pin is 5.0V tolerant.
I/O PICASO-SGC chip General Purpose I/O Port, bit7. This pin is 5.0V tolerant.
I/O PICASO-SGC chip General Purpose I/O Port, bit4. This pin is 5.0V tolerant.
I/O PICASO-SGC chip General Purpose I/O Port, bit6. This pin is 5.0V tolerant.
O Asynchronous Serial Transmit pin. Same connection as J3, pin 2.
--
--
P
P
P
P
P
I
I
Main Voltage Supply +ve input pin. Same connection as J3, pin 1.
PICASO-SGC chip General Purpose I/O Port, bit 15. This pin is also the bit 7 of
Parallel IO Bus (BUS0..7). This pin is 5.0V tolerant.
PICASO-SGC chip General Purpose I/O Port, bit 14. This pin is also the bit 6 of
Parallel IO Bus (BUS0..7). This pin is 5.0V tolerant.
Supply Ground.
Regulated 3.3 Volts output, available current max 400mA..
Asynchronous Serial Receive pin. Same connection as J3, pin 3.
Following Pins are Not Used: 1, 2, 3, 4, 5, 7, 8, 9, 10, 12, 14, 19, 20, 22, 24
Master Reset signal. Same connection as J3, pin 5.
Supply Ground.
PICASO-SGC chip General Purpose I/O Port, bit 13. This pin is also the bit 5 of
Parallel IO Bus (BUS0..7). This pin is 5.0V tolerant.
Regulated 3.3 Volts output, available current max 400mA..
PICASO-SGC chip General Purpose I/O Port, bit 12. This pin is also the bit 4 of
Parallel IO Bus (BUS0..7). This pin is 5.0V tolerant.
PICASO-SGC chip General Purpose I/O Port, bit 11. This pin is also the bit 3 of
Parallel IO Bus (BUS0..7). This pin is 5.0V tolerant.
PICASO-SGC chip General Purpose I/O Port, bit 10. This pin is also the bit 2 of
Parallel IO Bus (BUS0..7). This pin is 5.0V tolerant.
PICASO-SGC chip General Purpose I/O Port, bit 9. This pin is also the bit 1 of
Parallel IO Bus (BUS0..7). This pin is 5.0V tolerant.
PICASO-SGC chip General Purpose I/O Port, bit 8. This pin is also the bit 0 of
Parallel IO Bus (BUS0..7). This pin is 5.0V tolerant.
Following Pins are Not Used: 4, 6, 7, 8, 9, 10, 11, 12, 13, 16, 20, 22,24,26,28,29,30
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Data Sheet
Page 6 of 23