ST1200C12K1 Vishay, ST1200C12K1 Datasheet - Page 2
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ST1200C12K1
Manufacturer Part Number
ST1200C12K1
Description
SILICON CONTROLLED RECTIFIER,1.2kV V(DRM),1.7kA I(T),TO-200var75
Manufacturer
Vishay
Datasheet
1.ST1200C18K0P.pdf
(7 pages)
Specifications of ST1200C12K1
Rated Repetitive Off-state Voltage Vdrm
1200 V
Off-state Leakage Current @ Vdrm Idrm
100 mA
Holding Current (ih Max)
600 mA
Mounting Style
SMD/SMT
Package / Case
A-24
Breakover Current Ibo Max
32000 A
Gate Trigger Current (igt)
200 mA
Gate Trigger Voltage (vgt)
3 V
Repetitive Peak Forward Blocking Voltage
1200 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
ST1200C..KP Series
Vishay High Power Products
www.vishay.com
2
ABSOLUTE MAXIMUM RATINGS
PARAMETER
Maximum average on-state current
at heatsink temperature
Maximum RMS on-state current
Maximum peak, one-cycle
non-repetitive surge current
Maximum I
Maximum I
Low level value of threshold voltage
High level value of threshold voltage
Low level value of on-state slope resistance
High level value of on-state slope resistance
Maximum on-state voltage
Maximum holding current
Typical latching current
SWITCHING
PARAMETER
Maximum non-repetitive rate of
rise of turned-on current
Typical delay time
Typical turn-off time
BLOCKING
PARAMETER
Maximum critical rate of rise of
off-state voltage
Maximum peak reverse and
off-state leakage current
2
2
t for fusing
√t for fusing
For technical questions, contact:
SYMBOL
SYMBOL
SYMBOL
V
V
I
dV/dt
I
T(RMS)
dI/dt
I
I
I
RRM
T(TO)1
T(TO)2
V
T(AV)
I
DRM
TSM
I
2
r
r
t
t
I
I
2
TM
t1
t2
H
d
q
√t
L
Phase Control Thyristors
t
,
(Stud Version), 1650 A
Gate drive 20 V, 20 Ω, t
T
Gate current 1 A, dI
V
I
V
T
T
180° conduction, half sine wave
double side (single side) cooled
DC at 25 °C heatsink temperature double side cooled
t = 10 ms
t = 8.3 ms
t = 10 ms
t = 8.3 ms
t = 10 ms
t = 8.3 ms
t = 10 ms
t = 8.3 ms
t = 0.1 ms to 10 ms, no voltage reapplied
(16.7 % x π x I
(I > π x I
(16.7 % x π x I
(I > π x I
I
T
TM
pk
J
d
R
J
J
J
= T
= 0.67 % V
= T
= T
= 25 °C, anode supply 12 V resistive load
= 50 V, dV/dt = 20 V/μs, gate 0 V 100 Ω, t
= 4000 A, T
= 550 A, T
J
J
J
maximum, anode voltage ≤ 80 % V
maximum linear to 80 % rated V
maximum, rated V
T(AV)
T(AV)
indmodules@vishay.com
), T
), T
DRM
J
No voltage
reapplied
100 % V
reapplied
No voltage
reapplied
100 % V
reapplied
T(AV)
T(AV)
J
J
J
= T
= T
TEST CONDITIONS
TEST CONDITIONS
TEST CONDITIONS
= T
= T
, T
J
< I < π x I
< I < π x I
J
g
J
J
maximum, dI/dt = 40 A/μs,
J
/dt = 1 A/μs
maximum, t
maximum
maximum
= 25 °C
RRM
RRM
r
≤ 1 μs
DRM
T(AV)
T(AV)
Sinusoidal half wave,
initial T
/V
RRM
), T
), T
p
= 10 ms sine pulse
J
J
applied
J
= T
= T
= T
DRM
J
J
J
maximum
maximum
DRM
maximum
p
= 500 μs
Document Number: 94394
1650 (700)
VALUES
VALUES
VALUES
Revision: 23-Apr-10
55 (85)
30 500
32 000
25 700
26 900
46 510
1000
3080
4651
4250
3300
3000
1000
0.91
1.01
0.21
0.19
1.73
200
500
100
600
1.9
UNITS
UNITS
UNITS
kA
kA
A/μs
V/μs
mΩ
mA
mA
°C
μs
A
A
V
V
2
2
√s
s