CPM1A-10CDR-A Omron, CPM1A-10CDR-A Datasheet - Page 22

• Manufacturer Part Number: CPM1A-10CDR-A
• Description: PLC, 10 I/O, AC, RELAY OUTPUT
• Manufacturer: Omron

Specifications of CPM1A-10CDR-A

• Supply Voltage: 240VAC
• No. Of Digital Outputs: 4
• Svhc: No SVHC (15-Dec-2010)
• Approval Bodies: CE, CSA, UL
• External Depth: 85mm
• External Length / Height: 90mm
• External Width: 66mm
• Input Current: 5mA

CPM1A
J SUMMARY OF FUNCTION CODES
The following table lists the CPM1A instructions that have fixed
function codes. Each instruction is listed by mnemonic and by
instruction name. Use the numbers in the leftmost column as the
left digit and the number in the column heading as the right digit
of the function code.
Note: Only for the CPM1A transistor output models.
22
Cat. No. GC MSPLC1
Left
digit
0
1
2
3
4
5
6
7
8
9
1-800-55-OMRON
OMRON ELECTRONICS LLC
One East Commerce Drive
Schaumburg, IL 60173
NOTE: DIMENSIONS SHOWN ARE IN MILLIMETERS. To convert millimeters to inches divide by 25.4.
Right digit
0
NOP
No
operation
SFT
Shift
register
CMP
Compare
ADD(@)
BCD add
STC(@)
Set carry
ADB(@)
Binary
add
CMPL
Double
compare
XFER(@)
Block
transfer
DIST(@)
Single
word
distribute
---
1
END
End
KEEP
Keep
MOV(@)
Move
SUB(@)
BCD
subtract
CLC(@)
Clear
carry
SBB(@)
Binary
subtract
INI(@)
Mode
control
BSET(@)
Block set
COLL(@)
Data
collect
SBS(@)
Subrou-
tine entry
R
03/01
2
IL
Interlock
CNTR
Revers-
ible count-
er
MVN(@)
Move not
MUL(@)
BCD
multiply
---
MLB(@)
Binary
multiply
PRV(@)
High-
speed
counter
PV read
---
MOVB(@)
Move bit
SBN
Subrou-
tine define
3
ILC
Interlock
clear
DIFU
Differenti-
ate up
BIN(@)
BCD to
binary
DIV(@)
BCD
divide
---
DVB(@)
Binary
divide
CTBL(@)
Compari-
son table
load
XCHG(@)
Data
exchange
MOVD(@)
Move digit
RET
Subrou-
tine return
Specifications subject to change without notice.
4
JMP
Jump
DIFD
Differenti-
ate down
BCD(@)
Binary to
BCD
ANDW
(@)
Logical
AND
---
ADDL(@)
Double
BCD add
SPED(@)
Speed
output
(See
Note)
SLD(@)
One digit
shift left
SFTR(@)
Revers-
ible shift
register
---
5
JME
Jump end
TIMH
High-
speed
timer
ASL(@)
Shift left
ORW(@)
Logical
OR
---
SUBL(@)
Double
BCD
subtract
PULS(@)
Set pulses
(See
Note)
SRD(@)
One digit
shift right
TCMP(@)
Table
compare
---
6
FAL(@)
Failure
alarm and
reset
WSFT(@)
Word shift
ASR(@)
Shift right
XORW
(@)
Exclusive
OR
MSG(@)
Message
display
MULL(@)
Double
BCD
multiply
---
MLPX(@)
4-to-16
decoder
ASC(@)
ASCII
convert
---
7
FALS
Severe
failure
alarm
ASFT(@)
Asynchro-
nous shift
register
ROL(@)
Rotate left
XNRW
(@)
Exclusive
NOR
---
DIVL(@)
Double
BCD
divide
BCNT(@)
Bit
counter
DMPX(@)
16-to-4
encoder
---
IORF(@)
I/O
refresh
OMRON CANADA, INC.
416-286-6465
885 Milner Avenue
Scarborough, Ontario M1B 5V8
8
STEP
Step
define
---
ROR(@)
Rotate
right
INC(@)
Increment
---
---
BCMP(@)
Block
compare
SDEC(@)
7-seg-
ment
decoder
---
---
Printed in U.S.A.
CPM1A
9
SNXT
Step start
---
COM(@)
Comple-
ment
DEC(@)
Decre-
ment
---
---
STIM(@)
Interval
timer
---
INT(@)
Interrupt
control
MCRO
(@)
Macro