A1210ELHLT-T Allegro Microsystems Inc, A1210ELHLT-T Datasheet - Page 11

• Manufacturer Part Number: A1210ELHLT-T
• Description: IC LATCH HALL EFFECT SOT23W
• Manufacturer: Allegro Microsystems Inc
• Type: Bipolar Latchr

Specifications of A1210ELHLT-T

• Sensing Range: 150G Trip, -150G Release
• Voltage - Supply: 3.8 V ~ 24 V
• Current - Supply: 7.5mA
• Current - Output (max): 25mA
• Output Type: Digital, Open Drain
• Operating Temperature: -40°C ~ 85°C
• Package / Case: SOT-23W
• Operate Point Typ: 150G
• Termination Type: SMD
• No. Of Pins: 3
• Hall Effect Type: Latching
• Supply Voltage Min: 3.8V
• Operating Temperature Max: 85°C
• Peak Reflow Compatible (260 C): Yes
• Supply Voltage: 24V
• Magnetic Type: Latch
• Operating Supply Voltage (min): 3.8V
• Operating Supply Voltage (typ): 5/9/12/15/18V
• Operating Supply Voltage (max): 24V
• Output Current: 25mA
• Mag Sensor Operate Point (g): 150Gs
• Mag Sensor Release Point (g): -150Gs
• Mag Sensor Hysteresis(g): 155Gs
• Package Type: SOT-23W
• Pin Count: 3
• Mounting: Surface Mount
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Filter Terminals: SMD
• Rohs Compliant: Yes
• Leaded Process Compatible: Yes
• Operating Temperature Min: -40°C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -
• Lead Free Status / Rohs Status: Compliant

A1210, A1211,
A1212, A1213,
and
Power Derating
The device must be operated below the maximum junction
temperature of the device, T
peak conditions, reliable operation may require derating sup-
plied power or improving the heat dissipation properties of the
application. This section presents a procedure for correlating
factors affecting operating T
the Allegro MicroSystems Web site.)
The Package Thermal Resistance, R
marizing the ability of the application and the device to dissipate
heat from the junction (die), through all paths to the ambient air.
Its primary component is the Effective Thermal Conductivity,
K, of the printed circuit board, including adjacent devices and
traces. Radiation from the die through the device case, R
relatively small component of R
T
overmolding.
The effect of varying power levels (Power Dissipation, P
be estimated. The following formulas represent the fundamental
relationships used to estimate T

V

A worst-case estimate, P
able power level (V
at a selected R
For example, given common conditions such as: T
A
CC
, and air motion are significant external factors, damped by
T = P
T = P
= 12 V, I
T
P
A1214
D
J
= T
= V
A
D
CC
+ T = 25°C + 7°C = 32°C
×
CC
JA
×
R
= 4 mA, and R
I
JA
and T
CC
P
T
CC(max)
D
J
= 12 V
= 48 mW
= T
= V
A
D(max)
.
A
D
IN
, I
+ ΔT
×
J(max)
J
CC(max)
×
×
. (Thermal data is also available on
, represents the maximum allow-
R
×
JA
4 mA = 48 mW
J
I
JA
JA
, at P
IN
. Under certain combinations of
140 °C/W = 7°C
. Ambient air temperature,
= 140 °C/W, then:
), without exceeding T
(2)
JA
D
.
, is a figure of merit sum-
(1)
(3)
A
= 25°C,
Power Derating
JC
D
), can
J(max)
, is
,
Example: Reliability for V
minimum-K PCB.
Observe the worst-case ratings for the device, specifically:
R
I
Calculate the maximum allowable power level, P
invert equation 3:
This provides the allowable increase to T
power dissipation. Then, invert equation 2:
P
Finally, invert equation 1 with respect to voltage:
The result indicates that, at T
dissipate adequate amounts of heat at voltages ≤V
Compare V
able operation between V
R
V
CC(max)
JA
JA
CC(max)
V
T
Continuous-Time Latch Family
D(max)
CC(est)
. If V
= 165°C/W, T
max
= 7.5 mA.
is reliable under these conditions.
= T
= T
= P
CC(est)
CC(est)
J(max)
D(max)
max
≥ V
to V
J(max)
÷ R
– T
÷ I
CC(max)
JA
CC(max)
A
CC(max)
= 165°C, V
= 165 °C – 150 °C = 15 °C
= 15°C ÷ 165 °C/W = 91 mW
CC(est)
CC
115 Northeast Cutoff
1.508.853.5000; www.allegromicro.com
Allegro MicroSystems, Inc.
Worcester, Massachusetts 01615-0036 U.S.A.
, then operation between V
A
. If V
at T
= 91 mW ÷ 7.5 mA = 12.1 V
, the application and device can
and V
A
CC(est)
= 150°C, package UA, using
CC(max)
CC(max)
≤ V
J
= 24 V, and
resulting from internal
CC(max)
requires enhanced
D(max)
CC(est)
, then reli-
CC(est)
. First,
.
and
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