AS5013-ASST-1000 austriamicrosystems, AS5013-ASST-1000 Datasheet
AS5013-ASST-1000
Specifications of AS5013-ASST-1000
Related parts for AS5013-ASST-1000
AS5013-ASST-1000 Summary of contents
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... AS5013 Low Power Integrated Hall IC for Human Interface Applications General Description The AS5013 is a complete Hall Sensor IC for smart navigation key applications to meet the low power requirements and host SW integration challenges for products such as cell phones and smart handheld devices. Due to the on chip processing engine, system ...
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... PIN Types: S ... supply pad DI : digital input DIO_OD ... digital I/O / open drain 1.1 Ordering Information Model AS5013-IQFT www.austriamicrosystems.com Figure 3: QFN-16 package and pinout (TOP view) ESD 2kV I²C Data line, open drain 2kV I²C Clock line 2kV General Reset input: 0: Reset, 1: Normal mode ...
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... The movement of the magnet over the Hall elements causes response which is geometrically distributed like a bell- shaped curve. The maximum magnet travel is a circle of 2mm radius around the center of the AS5013. The hall elements C1..C4 are placed on a circle centered on the middle of the package. The hall element C5, placed exactly in the middle is used for better linearity response with magnet displacement larger than +-1 ...
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... Transfer function AS5013 has the possibility to adjust the transfer function for the used magnet and a specific range to optimize the linearity and resolution. The value will be provided from austriamicrosystems AG and has to be written in the algorithm related registers M_ctrl [0x2B], J_ctrl [0x2C], T_ctrl [0x2D] during the initialization phase. ...
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... After power up and after applying a soft reset (Reg 0Fh [1]) or hardware reset (RESETn input, LOW pulse >100ns), AS5013 enters the START-UP state. During this state the internal registers are loaded with their reset values. After min. Tstartup = 1000µs, the AS5013 will perform one measurement and switches automatically into the WAIT state. ...
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... AS5013 Data Sheet 3 I²C Registers 3.1 Control Register 1 (0Fh) Bit 7 Bit 6 Idle Time base bit[2] R/W R/W Reset value: 1111 0000 • Bit7: Idle Idle = 0: Low Power Mode The measurements are triggered with an internal low power oscillator – the user can select between 8 ...
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... AS5013 Data Sheet • Bit1: Soft_rst Soft_rst = 0: Normal mode (default). Soft_rst = 1: Reset mode. All the internal registers are loaded with their reset value. The Control Register 1 is loaded as well with the value 1111 0000, then the Soft_rst bit goes back to 0 (Normal mode) once the internal reset sequence is finished. • ...
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... AS5013 Data Sheet 3.4 Xp Register (12h) Bit 7 Bit 6 Xp [7] Xp [6] R/W R/W Reset value: 0000 0101 (5d) • Bit7-0: Xp range register Xp range value, 2’complement (signed: -128~+127). Determines the RIGHT threshold for the activation of INTn output (if output enabled), when bit INT_function = 1 (see Control Register 1(0Fh)). ...
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... AS5013 Data Sheet 3.8 M_ctrl Register (2Bh) Bit 7 Bit 6 M_ctrl [7] M_ctrl [6] R/W R/W Reset value: 0000 0000 (00h) • Bit7-0: M_ctrl register Middle hall element C5 control register to improve the linearity of XY outputs for the whole mechanical XY displacement of the magnet. Use the default value for d=2*0.8mm standard axial magnet. ...
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... AS5013 Data Sheet 3.11 Control Register 2 (2Eh) Bit 7 Bit 6 Test Test R/W R/W Reset value: 1000 0100 • Bit7: Test Test bit. Must be configured to ‘1’. • Bit[6:4]: Test Test bit. Must be configured to ‘000’. • Bit3: use_static_offset Test bit. Must be configured to ‘0’. ...
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... It is possible that this value cannot be reached with small magnets or with large airgaps. In that case set AGC to 3Fh, which is the maximum sensitivity. 3.14 Power ON The AS5013 has a Power ON Reset (POR) cell to monitor the VDD voltage at startup and reset all the internal registers. After the internal reset is completed, the POR cell is disabled in order to save current during normal operation. ...
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... AS5013 Data Sheet 3.15 Registers Initialization After Power Up, the following sequence must be performed: 1. VDD and VDDp Power up, and reached their nominal values (VDD>2.7V, VDDp>1.7V). 2. RESETn LOW during >100ns 3. Delay 1000µs 4. Loop check register [0Fh] until the value F0h or F1h is present (reset finished, registers to their default values) 5 ...
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... AS5013 Data Sheet 3.16 I²C Registers The following registers / functions are accessible over the serial I²C interface. Register #bits Access ID Code Version 8 R Silicon Revision 8 R Idle 1 R/W Low_power_timebase 3 R/W INT_disable 1 R/W INT_function 1 R/W soft_rst 1 R/W data_valid y_res_int R/W www.austriamicrosystems.com ...
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... AS5013 Data Sheet Register #bits Access c4_neg <11:8> c4_neg <7:0> c4_pos <11:8> c4_pos <7:0> c3_neg <11:8> c3_neg <7:0> c3_pos <11:8> c3_pos <7:0> c2_neg <11:8> c2_neg <7:0> c2_pos <11:8> c2_pos <7:0> c1_neg <11:8> c1_neg <7:0> c1_pos <11:8> c1_pos <7:0> c5_neg <11:8> c5_neg <7:0> ...
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... AS5013 Data Sheet Register #bits Access M_ctrl 8 R/W J_ctrl 8 R/W T_ctrl 8 R/W Test 1 R/W Test 1 R/W Test 1 R/W ext_clk_en 1 R/W use_static_offset 1 R/W EN_offset_comp 1 R/W inv_spinning 1 R/W pptrim_en 1 R/W www.austriamicrosystems.com Address Format Reset Value Control register for the algorithm 2Bh 00h 2Ch ...
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... I²C interface The AS5013 supports the 2-wire high-speed I²C protocol in device mode, according to the NXP specification UM10204. The host MCU (master) has to initiate the data transfers. The 7-bit device address of the AS5013 depends on the state at the pin ADDR. • ADDR = 0 Slave address =‘ ...
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... AS5013 Data Sheet 4.2 I²C Electrical Specification Standard-mode, Fast-mode, High Speed-mode Symbol Parameter V LOW-Level Input Voltage IL V HIGH-Level Input Voltage IH V Hysteresis of Schmitt Trigger Inputs hys V LOW-Level Output Voltage (open-drain or open-collector) at 3mA OL Sink Current I LOW-Level Output Current OL I Pull-up current of SCLH current source ...
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... AS5013 Data Sheet Symbol Parameter V Noise margin at LOW level nL V Noise margin at HIGH level nH (1) after this time the first clock is generated (2) A device must internally provide a minimum hold time (300ns for Fast-mode, 80ns / max 150ns for High-speed mode) for the ...
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... Data Sheet 4.4 I²C modes The AS5013 supports the I2C bus protocol. A device that sends data onto the bus is defined as a transmitter and a device receiving data as a receiver. The device that controls the message is called a master. The devices that are controlled by the master are referred to as slaves. A master device that generates the serial clock (SCL), controls the bus access, and generates the START and STOP conditions must control the bus. The AS5013 operates as a slave on the I² ...
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... AS5013. This sets the address pointer on the AS5013. If the address is a valid readable address the AS5013 answers by sending an acknowledge. If the address-pointer points to an invalid position a “not acknowledge” is sent. ...
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... AS5013 Data Sheet condition. The slave address byte contains the 7-bit AS5013 address. The default address is 80h. The 7- bit slave address is followed by the direction bit (R/W), which, for a read After receiving and decoding the slave address byte the device outputs an acknowledge on the SDA line. The AS5013 then begins to transmit data starting with the register address pointed to by the register pointer ...
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... Sequential read over the whole address range is possible including address overflow. Writing: A write to a wrong address is not acknowledged by the AS5013 slave, although the address pointer is increased. When the address pointer points to a valid address again, a successful write accessed is acknowledged. Page write over the whole address range is possible including address overflow ...
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... AS5013 Data Sheet 5 Device specifications 5.1 Absolute maximum ratings (non operating) Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only. Functional operation of the device at these or any other conditions beyond those indicated under “ ...
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... AS5013 Data Sheet 5.2 Operating conditions (operating conditions -20 to +80°C, VDD = 3.3V, RESETn = HIGH) amb Parameter Core Supply voltage Peripheral Supply voltage Maximal average current consumption on VDD, Pulsed peaks = IDDf depends on the sampling time ts[ms] Current consumption on core supply, Idle mode, ...
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... AS5013 Data Sheet 5.3 Digital IO pads DC/AC characteristics Parameter High level input voltage Low level input voltage Input leakage current High level input voltage Low level input voltage Input leakage current High level output voltage Low level output voltage Low level output voltage ...
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... AS5013 Data Sheet 6 Package Drawings www.austriamicrosystems.com Revision 1.09 26 – 31 ...
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... AS5013 Va.b IC version 9 Recommended Mounting The typical mounting configuration of the AS5013 with the mechanics is on both sides of the PCB: - Mechanics + Magnet on the top side - AS5013 IC on the bottom side A thickness of 0.6mm to 1.0mm for the PCB is recommended. A dome switch for push button function can be added as well. ...
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... AS5013 Data Sheet GND via for dome switch contact on bottom layer www.austriamicrosystems.com Bottom SIDE View (AS5013) Top SIDE View (mechanics side) Figure 18: Layout example for low profile joystick Revision 1.09 VDD & VDDp 100nF capacitors ADDR to GND (example) Dome switch contact on ...
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... Table of contents General Description ................................................................................................................................................ 1 1 Package and pinout ..................................................................................................................................... 2 1.1 Ordering Information ................................................................................................................................ 2 2 Operating the AS5013.................................................................................................................................. 3 2.1 Typical application.................................................................................................................................... 3 2.2 XY coordinates interpretation ................................................................................................................... 3 2.3 Transfer function ...................................................................................................................................... 4 2.4 Power modes ........................................................................................................................................... 5 3 I²C Registers................................................................................................................................................ 6 3.1 Control Register 1 (0Fh) ........................................................................................................................... 6 3.2 X_Register (10h) ...................................................................................................................................... 7 3.3 Y_res_int Register (11h)........................................................................................................................... 7 3 ...
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... AS5013 Data Sheet Revision History Revision Date Description 1.00 15.06.2010 Y_res_int ACK resets INTn, not STOP bit Bit Soft_rst description inverted (soft_rst = Normal mode) Control register 2 bit 7: always 1 and Test bits fixed to ‘0’ Added PSSR and Noise values 1.01 02.07.2010 Chapter 4 ...
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... AS5013 Data Sheet Copyrights Copyright © 1997-2011, austriamicrosystems AG, Schloss Premstaetten, 8141 Unterpremstaetten, Austria-Europe. Trademarks Registered ®. All rights reserved. The material herein may not be reproduced, adapted, merged, translated, stored, or used without the prior written consent of the copyright owner. All products and companies mentioned are trademarks or registered trademarks of their respective companies. ...