USBN9604-28M National Semiconductor, USBN9604-28M Datasheet - Page 28
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USBN9604-28M
Manufacturer Part Number
USBN9604-28M
Description
Special Function IC
Manufacturer
National Semiconductor
Datasheet
1.USBN9604-28M.pdf
(60 pages)
Specifications of USBN9604-28M
Peak Reflow Compatible (260 C)
No
Leaded Process Compatible
No
Mounting Type
Surface Mount
Package / Case
28-WSOIC
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
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6.0 Functional Description
6.2.3
Figure 23 illustrates the register hierarchy for event reporting.
.
6.3 POWER SAVING MODES
To minimize the power consumption of the USB node, the device can be set to a static Halt mode. During Halt mode, the
clock oscillator circuit is disabled, stopping the external 24 MHz clock and 48 MHz frequency doubler, as well as the clock
output signal provided on the CLKOUT pin. However, all device internal status and register settings are preserved.
The device is set to Halt mode under the following conditions:
If Halt On Suspend (HOS) is enabled (the HOS bit in the WKUP register is set to 1), the device enters Halt mode
when the node is set in Suspend state. Writing a 1 to HOS after the node is in Suspend state has no effect.
If the node is not attached, the device enters Halt mode, when the Force Halt bit (FHT) in the Wake-Up register is
set to 1.
Programming Model
FWEV
RXEV
(Continued)
Figure 23. Register Hierarchy
TXEV
28
MAEV
RXS0
RXC0
RXD0
RXCx
RXDy
TXS0
TXC0
TXD0
TXCx
TXDx
RXSy
TXSx
ALTEV
RFIFOy
TFIFOx
64 byte
64 byte
FIFO0
8 byte
EPC0
EPCx
EPCy
NAKEV